While loop in test bench of and gate. getting no output

Question

I have written a simple test bench for and gate. My code and test bench was working fine. Now what I want to do is " I am trying to implement a while loop for my cases". I am not getting syntax error but not seeing any output. can any body tell my mistake?.

timescale 1ns / 100ps

int count=0; module and_gate_test;

// Inputs
reg in1_t;
reg in2_t;

// Outputs
wire out_t;

// Instantiate the Unit Under Test (UUT)
and_gate and_gate_1 (in1_t,in2_t,out_t);


initial 
begin
    // Initialize Inputs
    //case 0
    while(count==100){
    in1_t <= 0;
    in2_t <= 0;
    #1 $display ("out_t=%b",out_t);
            //case 1
    in1_t <= 1;
    in2_t <= 1;
    #1 $display ("out_t=%b",out_t);

    //case2
    in1_t <= 0;
    in2_t <= 1;
    #1 $display ("out_t=%b",out_t);

    //case3
    in1_t <= 1;
    in2_t <= 0;
    #1 $display ("out_t=%b",out_t);

   count++; }
    // Add stimulus here

end

endmodule

Answer 1

Your code never enters the while loop because count is initialized to zero before checking the while==100 condition. Even if the condition wasn't broken, the brace after it would break the rest of the code. I think this is what you're trying for:

// Inputs
reg in1_t;
reg in2_t;

// Outputs
wire out_t;

// test variables
integer count;

// Instantiate the Unit Under Test (UUT)
and_gate and_gate_1 (in1_t,in2_t,out_t);

initial 
   begin
      // Initialize Inputs
      for (count=0; count<=100; count=count+1) begin
         //case 0
         in1_t <= 0;
         in2_t <= 0;
         #1 $display ("out_t=%b",out_t);

         //case 1
         in1_t <= 1;
         in2_t <= 1;
         #1 $display ("out_t=%b",out_t);

         //case2
         in1_t <= 0;
         in2_t <= 1;
         #1 $display ("out_t=%b",out_t);

         //case3
         in1_t <= 1;
         in2_t <= 0;
         #1 $display ("out_t=%b",out_t);
      end
   end