# Buffering Long TTL Lines

I'm laying out a stacked PCB where I have 3 or 4 boards stacked on top of each other with signals propogating down with female/male headers (think Arduino shields), shared control signals are propagating down from the top (logic) board to the lower daughter boards, with certain runs being 12 inches or more between the logic out and logic in.

Is it necessary to buffer TTL signals, and is there a maximum trace/path length before when its important?

• I like your question and I would like to know the correct answer too. But as far as my knowledge goes, Wires/traces have their own resistance and it is not advisable to have long lengths running through the boards. Jun 21 '13 at 1:44

Oh boy, where to begin...

Basically, there is this whole field called "signal integrity" that directly relates to what you are asking about. SI is a complex topic that takes years to really comprehend and wrap your head around. There is a lot of information on the net about SI, and honestly most of it is wrong, misleading, or misguided. Unfortunately, knowing this stuff is essential to getting digital systems to be robust and reliable. Every EE should know this stuff.

The best guide for this is the book High Speed Digital Design: A Handbook of Black Magic. A highly recommended book, and worth every penny!

There is no way that I can give you a good overview of the things you need to know about SI. The topic is that big and complex. But let me give you some random bullet items that hopefully will, with a good book, point you in the right direction.

• Voltage drop across the traces/cable/wires isn't normally an issue for a digital signal unless the traces/cables are several meters or more. It's ohms law: voltage drop = current * resistance. And the current just isn't big enough.
• Knowing about and controlling trace/wire impedance is super important. If you don't know the impedance then you cannot get proper SI.
• Using the correct type of signal termination is essential. I say this again: ESSENTIAL.
• Signal topology (how the signal is routed) is critical in knowing what type of signal termination to use.
• Faster clock/signal rates does not determine if a signal needs termination-- it is the speed of the edges of the signal. Even a reset line that switches only once could still require proper signal termination.
• The stackup of the PCB (how the layers are arranged, and the space between layers) is critical for controlling trace impedance.
• Pinouts of cables and connectors is critical. Arrange the signals and power/gnds wrong and it will be terrible.
• Decoupling caps are for much more than just making the power smooth. Again, this is critical.
• Higher signaling voltages helps some things, but hurts others. Unless you are going long distances (more than 10 meters), don't bother. For example, don't run RS-232 levels if you are just going to the next board in your stack.

I also want to stress again that most things you find on the net get some or all of this wrong. Arduino stuff especially. Get a good book, and use that as a solid foundation. Oh, most books have major errors too. The book I mention is very good and is considered by almost everyone to be the golden standard.

The MSEEs will have to chime in on this one, but my knowledge is such.

You've got a couple of things to worry about. One is the voltage drop across longer and longer lengths of wire. Too much drop and you may be below the threshold of the receiving circuit to recognize a logic state.

The other thing is the variability of the level on the line. If you are sendin a constant signal, ok, if you are sending a signal that goes up down up down, say once a second (slow enough so you could see with your eye if you hooked up a light to it)' ok, but really anything above that and you have to consider the frequency response of your line, it's ability to react to fast changes and get the same signal on the receiving pin. This depends on capacitance, inductance, MSEEs start to chime, please....

This situation is exactly why they make rs232, etc.