How should I choose the resistors in a voltage divider?

Question

I would like to measure tree signals by using a ucontroller.

the signals are between

• -5V to 5V
• 0V to 2V
• -20V to 20V

The frequency of the signals are between 1MHz and 5MHz. The ADC range is between 0 and 3V.

I built the following simulation, where I am dividing and shifting the measured signal:

I have the following questions regarding the circuit:

• How should I choose the resistors in the voltage divider and OP-AMP gain?
• How can I make 'dynamic' voltage divider? I mean controlled by microcontroller? I checked the analog switches in the TI website but I am not really familiar with those switches.
• How can I protect the circuit from over voltages?

Answer 1

• The "resistors in the voltage divider" presumably refer to Resistor 6 and Resistor 7 in the schematic, providing the biased signal voltage to one of the inputs of the op-amp.
  • These dividers would be selected such that their combined resistance in parallel is significantly smaller than the input impedance of the op-amp. Otherwise, the current into the op-amp input will change the bias voltage - like putting an additional resistor of comparable value in parallel with one leg of the divider.
  • Also, they should be of high enough value that the current through them does not draw an unreasonable amount of current from DC Voltage Source 1.
  • Finally, the resistors should be of sufficient power rating to tolerate the power dissipation P = I^2 x R for the current drawn through them, I = V(DC1) / (R1 + R2)
• The op-amp gain resistors would depend on the gain desired. Since the schematic does not indicate inverting and non-inverting inputs, it is not clear (at least to me) whether this is intended as an inverting or non-inverting amplifier, and what the intention of that part of the design is.
• Dynamic voltage dividers can be implemented in a variety of ways, which include using a digital potentiometer IC, an resistor array with switched legs, etc.
  • If one assumes that the question envisages only 3 possible input signal voltages, a dynamic voltage divider may not be needed. One could structure 3 voltage dividers, and switch the appropriate one in using a very small R_ds(on) MOSFET, such that the MOSFET's resistance does not discernibly impact circuit behavior.
  • Just 2 voltage dividers would suffice, if the intention is merely to provide a counter-bias of -1 Volts for the 0-2 Volt signal when that is the source.
• Overvoltage protection (presumably referring to the input signal voltage) can be achieved by using a voltage limiting zener diode circuit, at the simplest level.
  • Depending on the currents involved and the behavior desired, other solutions such as voltage foldback or SCR-based crowbar circuits may be called for - apparently not applicable in this case.