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This Question very basic and may be dumb question..

I remember for every trace a return current will flow exactly under it(minimum inductance path) or shortest path(minimum resistance).

I have a 2 layer board with GND on bottom and routes on top layer and GND Copper pour on Top layer.

When there is GND very near in the form of a copper pour for signal, why a signal will take only GND plane on bottom layer for return signal.( i assumed interfaces like SPI max freq can be 40Mhz)

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Why a signal will take only GND plane on bottom layer for return signal?

It won't. If you have ground on both the top and the bottom layer, then you have this:

schematic

simulate this circuit – Schematic created using CircuitLab

Current will flow in both, proportionate to the resistances of each path. If the resistances are equal, the currents will be equal. If they are unequal, the lower resistance will carry more current. If they are very unequal, the much lower resistance will carry most of the current. Never does one path carry all of the current.

This is the same for AC signals, with the resistors replaced with inductors. Analysis of where the currents flow is complex, and will really depend on the specific geometry. However, with carefully controlled dimensions, this structure (ground plane on bottom, signal trace surrounded by ground plane on top) forms a transmission line called a grounded coplanar waveguide.

To your statements in the question, it's not exactly true that return currents flow exactly under the signal trace. This is only true for signals of infinite frequency. As the frequency gets lower than infinity, the inductance of diverging from this path becomes less significant, and the resistance of the ground plane becomes relatively more significant, so as the frequency gets lower, the return current will round the corners more. At DC, frequency is zero, so the inductance is irrelevant, and the current will prefer the lowest resistance path, which is probably the shortest path, if the copper is equally thick everywhere.

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  • \$\begingroup\$ Thanks for the link to CPW -- although that article talks about IC layout, not PCB layout... I imagine the physics will be similar, but for much larger/slower signals? \$\endgroup\$ – Jon Watte Jul 1 '13 at 23:39
  • \$\begingroup\$ @JonWatte I didn't even notice it was about IC layout. That article is aimed at MMIC engineers, but this is also how the PCB will move the microwave signals between the MMICs. It works even for fast signals. \$\endgroup\$ – Phil Frost Jul 1 '13 at 23:59
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Some of the return current will flow in the pour on the same level as the signal. However, in normal geometries, the coupling between the trace and the adjacent copper is poor, as they are 'edge-to-edge'. The plane beneath, even though it is further away, couples very well to the trace as they are broadside coupled, in effect being two parallel 'plates'.

Of course, the relative amounts of return current depend of the precise geometry of the situation - as you move the bottom plane further away, more and more of the return current will flow in the layer 1 pour, as it becomes relatively better coupled.

In microwave-land, this kind of structure is called coplanar waveguide

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  • \$\begingroup\$ I have a vague idea. I remember an explanation in some book, says when a signal travels it charges a capacitance formed by Trace thickness, dielectric and bottom plane. So, this capacitance basic eqn = Epsilon* A/d. For return current in bottom plane, Epsilon = 4.2,A = depends on trace thickness, h = height of dielectric. in case of return current for side copper pour on top layer, epsilon of air =1, A = depends on copper thickness on top layer(1oz),h= clearance of PCB. Is this correct... \$\endgroup\$ – user19579 Jul 2 '13 at 5:29
  • \$\begingroup\$ That's a good first approximation. It's complicated by the fact that the fields on the top curve over so the notional 'area' is not just the 'height' of the trace \$\endgroup\$ – Martin Thompson Jul 2 '13 at 14:39

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