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I'm in the early learning stages of EE and I'm trying to understand the concepts of different things so I can then use these ideas in my own hobby projects.

One such concept that I'm struggling with is how to limit voltage to protect ADC. (in a similar way to a scope & its probes)

I understand how the ADC works and that anything above AREF on the ADC pin isn't good for the continued operation of the pins. I'm also happy with the concept of potential dividers to scale things down for AREF/ADC etc.

However, if the target voltage isn't known, how can I ensure that any voltage above AREF is capped to AREF before it hits the ADC pin?

Or do I need to design for a maximum voltage, scale from that, and accept that anything over this may blow pins?

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  • \$\begingroup\$ Which ADC are you using - it is likely that the input can go above AREF providing the Vcc is greater than AREF. If AREF is tied to Vcc then I understand but some clarification would help. \$\endgroup\$
    – Andy aka
    Commented Jul 9, 2013 at 9:45
  • \$\begingroup\$ I was speaking in general, rather that from any specific micro. I'm looking at situations where the input could be significantly above Vcc. (ie 24v input on 5v AREF/Vcc) \$\endgroup\$
    – Dave
    Commented Jul 9, 2013 at 10:54
  • \$\begingroup\$ You can't design for the unknown. Determine the voltage that the circuit must handle in a normal way, maybe also a 'survival' level that can be higher, and design from those requirements. \$\endgroup\$ Commented Jul 9, 2013 at 12:12

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See Protection of ADC inputs

The simplest form of protection is a Zener diode of suitable voltage across the input. Overvoltage will flow through the zener not your IC. This is a form of "clamp" circuit. Series resistors are added to limit the total current flow into the pin or protection diodes, although those aren't suitable for high frequency applications.

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