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I have a circuit that I am currently designing using a 4 layer PCB (signal, ground, power, signal). The PCB has rather a lot of vias to route the signals around the board (there are size constraints, meaning I can't space the ICs as much as I would like which would make it easier to route the signals without vias). The circuit is primarily an audio intercom system, with the vast majority of signals being of audio frequency. There are only a couple of ICs that have high (10MHz) signals and these I have been able to place close together, i.e. reduce signal trace length.

My question is when should you consider adding an additional signal plane? Is there a point at which it becomes better to add an additional signal plane (e.g. going to 6 layer board instead of 4) rather than use a lot of vias? Is there a frequency of operation above which it is better to do this?

Edited to add PCB images: Front/top Back/bottom

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    \$\begingroup\$ Is your board autorouted or hand-routed? Can you show us an image of your present layout? \$\endgroup\$
    – Dave Tweed
    Jul 11, 2013 at 13:34
  • \$\begingroup\$ Board has been hand-routed, images of both signal planes added. I've not done a design with 4 layers before, so I don't know whether the number of vias I have is excessive, or looks normal. \$\endgroup\$
    – John
    Jul 11, 2013 at 17:10
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    \$\begingroup\$ Looks normal to me. In fact, compared to boards that I've done of similar complexity, you've got lots of room. No need to add more layers. Just spend a few more hours optimizing your existing layout. Even without the two layers overlaid, I see quite a few vias that could be eliminated. \$\endgroup\$
    – Dave Tweed
    Jul 11, 2013 at 17:24

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Before you expand the board to 6 planes, at least stop wasting what you have. What exactly do you imagine a dedicated power plane does for you? Think about it instead of blindly following someone else's religion. Yes, I know a lot of designs are like that, but without a solid technical reason it's just mass superstition.

Use wide enough traces for the power feeds to support the required current, then locally bypass at each point of use to make sure the impedance at high frequencies is low too. Preferentially route high current traces on the bottom layer, then on the top layer, then in middle layers only as a last resort. The reason for that is that the outer layers are usually thicker, or can be made thicker for a smaller incremental cost.

Here is a good layer stackup:

  1. Primarily signals, but can have power traces too. This is where the pads are, so this is the best place for short interconnects between nearby parts. It is also a good place for sensitive signals since they are immediately above the ground plane with all other signals on the other side of the ground plane.

  2. Ground. General ground pins of analog parts should have a via nearby and immediately connect to this plane. That leaves more room for routing signals on the top plane, and makes sure each analog ground point is a good ground.

  3. Third choice for signals. This layer is mostly used to route signals where the topology requires more cross-overs. The first defense against messy routing is good layout. But, even after good layout sometimes you need yet another jumper or bridge that just doesn't fit on the other layers. The reason to use this as last choice is because it's more difficult to debug and edit signals that are on inner layers.

    In some cases this layer is a local ground patch for something that makes nasty high frequency currents thru its power feed, like a lot of digital chips and their immediate surroundings. This local ground is then connected to the master ground in exactly one place.

  4. Preferred layer for power feeds, second choice for signals.

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    \$\begingroup\$ What does a dedicated power plane do for you? \$\endgroup\$
    – dext0rb
    Jul 11, 2013 at 17:26
  • \$\begingroup\$ Follow on question please Olin: does your point 3 italics mean that if part of layer 3 has signals and part of it has a grounded copper pour, then if through vias are used to tie pins on layer 1 to ground (meaning that they will also exist on layer 3), then they should not be attached to this ground plane? i.e. left unconnected to the ground plane, apart from one via, which does? Or is it ok to have the grounded vias all connected to the layer 3 ground plane? Is this a 'ground loop' and bad? \$\endgroup\$
    – John
    Jul 11, 2013 at 18:55
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    \$\begingroup\$ @John: If you have a local ground polygon, connect all the pins of that local ground directly to the polygon. Then connect that polygon to the main ground at a single point. That way the high frequency currents running between the parts on the local ground will stay off the main ground. I often position the connection point to the main ground near the connection point to power for this subsection, then place a secondary bypass cap accross these two points. You might use 1 uF for bypass caps at individual pins, then 10 uF for secondary bypass accross the power/ground feed points. \$\endgroup\$ Jul 12, 2013 at 12:06
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    \$\begingroup\$ @dextorb: In some high current applications it can be useful, but mostly its just to satify someones religious beliefs. \$\endgroup\$ Jul 12, 2013 at 12:07
  • \$\begingroup\$ @OlinLathrop Hrm, OK, thanks. I have worked on a few designs that use a dedicated split power plane. You're saying there is no need for this other than high current use? I guess my religious belief is that the plane gives lower impedance and this helps in some way, but I have no documentation (Bible) to back this up. \$\endgroup\$
    – dext0rb
    Jul 12, 2013 at 16:48

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