I am trying to understand a protocol (shown in figure 1) . For now this I have understood that data is transferred at high to low clock. as shown in figure. and the sync is for every 8-bit.
But then there is another data at the data line, as shown in figure 2, that is changing in the low of the clock. This does not happens at a particular instance but some time at 3rd, 4th, 8th etc. bit with respect to sync. Also this data is different every time.
After this the data is transferred at every low to high clock, still with 8-bit sync (Figure 3). So, I am thinking this may be sort of change of direction of data from read cycle to write(or vice versa).
Can somebody help me understand this.
Edit: Its a probably a memory chip, canon is using in the protocol in there printer chips (Printer iP7230) to communicate the printer levels.
I saw this some days back thought I can try this. http://www.instructables.com/id/Reverse-Engineering-to-Emulate-Ink-Cartridges-for-/
I just wanted to be pointed in the direction of what sort of protocol it can be.