The datasheet for the NXP PCA8574/74A contains the following line on addressing (p.6):

When AD2, AD1 and AD0 are held to VDD or VSS, the same address as the PCF8574 or PCF8574A is applied.

I'm afraid I don't understand what is meant here. Can someone clarify please?
Also, while address ranges are given as (depending on inputs AD0..AD2)

PCF8574: 0x20 - 0x27
PCF8574A: 0x38 - 0x3F

both the text and fig.7 suggest that the device address can freely be chosen between 0x01 and 0x7F (though I don't see how this would be done).

alt text

Or am I reading this wrong?


The data sheet clearly indicates that there are "8 programmable slave addresses using 3 address pins" right there in Section 2 bullet 7. In other words, there is a 7-bit address, 4 of those bits are the same for all chips (internally hard coded), and 3 of them (bits 0, 1, and 2 in particular) are programmable by setting (i.e. electrically connecting) the pin values to either Vss (GND) or Vdd (i.e. 5V). What the top 4 bits are internally hard coded to depends on the chip you are using - table 4 indicates that those bits are A[6:3] = 0100 for the PCA8574 and table 5 indicates that those bits are A[6:3] = 0111 for the PCA8574A.

To make it crystal clear, for the PCA8574 the lowest address possible is 010 0000 == 0x20 and the highest address possible is 010 0111 == 0x27. Likewise for the PCA8574A the lowest address possible is 011 1000 == 0x38 and the highest address possible is 011 1111 == 0x3F.

  • \$\begingroup\$ Agreed, and that's how I2C devices are usually configured, but figure 7 suggests that A[6:3] can be anything between 0000 and 1111, and the text also expressly says that 111 1100 is excluded. \$\endgroup\$ – stevenvh Dec 6 '10 at 16:24
  • \$\begingroup\$ @stevenvh Figure 7 is merely establishing the bit-order (i.e. bit 6 is the most significant bit and bit 0 is the least significant bit and should be followed by the r/w flag) with respect to the transmission on the bus. 111 1100 is excluded because the only allowed addresses are 011 1xxx and 010 0xxx. The exclusions for general call is that it is just "not supported" by the device. I couldn't say what's "special" about the address 0b1111100 == 0x7C, I don't think it has any meaning in I2C protocol... probably just an FYI from the manufacturer to please keep that value "off the bus." \$\endgroup\$ – vicatcu Dec 6 '10 at 16:30
  • \$\begingroup\$ @stevenvh Conservatively, I think what they are saying is that you cannot use the PCA8574A in a system that (a) uses general call, or (b) has some other device with the address 0x7C - as the PCA8574A can't tolerate that condition "for some reason." If the PCA8574A is the only I2C device on your bus, it's probably not a restriction that you care about. \$\endgroup\$ – vicatcu Dec 6 '10 at 16:38
  • \$\begingroup\$ @stevenvh: That figure 7 is at least misleading, if not outright wrong. The caption states that it is for the PCA8574/74A, but for these chips only the 3 lower address bits are programmable, the higher bits are fixed. So either the accolade that spans the programmable bits is wrong, or the caption should be something like "general 7-bit I2C address". \$\endgroup\$ – Wouter van Ooijen Sep 11 '11 at 9:32

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