2
\$\begingroup\$

I use code composer to program the TMS320C31 DSP (through MPSD) to write to the SST39SF010A flash. I can successfully write one byte to any location of the flash by following the "Chip Erase" then "Byte-Program Algorithm" sequences mentioned in the datasheet.

The problem is when I want to write more than one byte in different locations, only the first byte is written and the rest aren't. I added delays between writes but no difference.

What is the cause of this problem? I searched for drivers (Programming algorithms) for this flash but couldn't find!

Update: 21/7/2013

  • First:

This is the code we wrote to program the flash:

void main()  {

volatile unsigned int * start_flash = (volatile unsigned int *)0x00001000;   
      volatile unsigned int * end_flash = (volatile unsigned int *)0x0001ffff;

      volatile unsigned char * flash_addr1 = (volatile unsigned char *)0x005555;    
      volatile unsigned char * flash_addr2 = (volatile unsigned char *)0x002aaa;
      volatile unsigned char * flash_addr3 = (volatile unsigned char *)0x005555; 
      volatile unsigned char * flash_addr4 = (volatile unsigned char *)0x010000;

      volatile unsigned int x = 0;     

          // Chip Erase

        * flash_addr1 = 0xaa;    
        * flash_addr2 = 0x55;      
        * flash_addr1 = 0x80;    
        * flash_addr1 = 0xaa;
        * flash_addr2 = 0x55;
        * flash_addr1 = 0x10; 

        // Delay
        for(x=0;x<=100000;x++);          

        // Byte Program

        * flash_addr1 = 0xaa;    
        * flash_addr2 = 0x55;
        * flash_addr3 = 0xa0;  

        // Data in the first address

        * (start_flash) = 0xba;

        for(x=0;x<=100000;x++); 

       // Data in the following address

        * (start_flash+1) = 0xab;

        while(1);
  }

"BA" is written correctly in the first address but "AB" isn't.

  • Second:

We are using an FPGA in the system between the DSP and the Flash (and all other system peripherals). Data and Address of DSP is bypassed through the FPGA to the Flash, and control signals are generated from the FPGA. I think there is no problem in generating the control signals since we are able to write one byte successfully, is that correct?

\$\endgroup\$
  • \$\begingroup\$ Any help? Please let me know the suitable section for this question if i posted in a wrong one. \$\endgroup\$ – Abdella Jul 20 '13 at 12:07
  • \$\begingroup\$ Are your sure your hardware is fine? These random issues wil come when any of the address or data or control lines are shorted to GND or VCC or they are struck. Timing variations may not be the cause... \$\endgroup\$ – user19579 Jul 20 '13 at 15:48
  • \$\begingroup\$ @user19579 , Yes I checked the data and address lines and there are no floating or stuck pins. This issue till now is not random. It's consistent, only one byte is written in any address. Can't write more than that! \$\endgroup\$ – Abdella Jul 20 '13 at 18:57
  • \$\begingroup\$ Can u able to attach the memory interfacing section schematic alone. How OE# of memory connected. provide Software driver details also. \$\endgroup\$ – user19579 Jul 21 '13 at 5:11
  • \$\begingroup\$ @user19579 , thanks for following. Please check the updates above. \$\endgroup\$ – Abdella Jul 21 '13 at 11:29
1
\$\begingroup\$

Problem solved and I would like to share the solution:

Software Data Protection

This feature is available on some flashes that requires a software sequence at the beginning of each write cycle in order for a write to be performed. To enable the software data protection feature, a series of three-write commands to specific addresses with specific data must be performed. Once set, the same 3-byte code must begin each write request. This feature is permanently enabled in the flash I'm using.

So the solution is to add the following commands before any byte write operation not only the first one:

    * flash_addr1 = 0xaa;    
    * flash_addr2 = 0x55;
    * flash_addr3 = 0xa0;  
\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.