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Convention?

Easier to implement?

Another reason?

Is there a reason things like MCLR or RESET on microcontrollers are active-low, that is, you have to pull them down to reset the IC, and pull them up to "run" the IC.

I'm just curious because this causes me some problems. If it were active high, I could avoid the capacitor on MCLR required in some instances and deal with just a pull-down resistor. It seems only to add to complexity.

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  • \$\begingroup\$ As a side note, if you don't have a good ground, your ground can oscillate also. If you were using a pulldown configuration you could still need a capacitor on MCLR. \$\endgroup\$ – Kellenjb Dec 8 '10 at 16:30
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Look at what happens during power-up: Vcc rises to a point where it's high enough to make everything work properly. However, that point isn't clearly defined and may vary from device to device. It makes sense not to use this voltage to reset the controller.
It's easy, however, to keep a level low regardless of Vcc. After all, Reset is already active the instant you switch power on, since at that moment everything is at a low level.

edit
The graph below illustrates how the output voltage of the reset controller (i.c. an MC34064) remains low until Vcc is high enough to have the complete microcontroller stable.

alt text

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  • \$\begingroup\$ This is what I was going to ask. \$\endgroup\$ – Kortuk Dec 8 '10 at 17:37
  • \$\begingroup\$ -1 -- It's just as easy to keep a level high regardless of Vcc. You use a pullup transistor or resistor, the same way you would use a pulldown transistor or resistor. Your argument says nothing special about the difference between the voltages at the power supply pins. On power-up, they move apart, and the valid logic levels are relative to the power supply voltage. \$\endgroup\$ – Jason S Jan 8 '11 at 15:56
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    \$\begingroup\$ @Jason: it makes more sense to keep it at a level which is always clearly defined than rely on a level which is constantly changing. \$\endgroup\$ – stevenvh Jan 8 '11 at 16:06
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    \$\begingroup\$ Vcc and Gnd are both changing relative to each other. It's just convention that we think of Gnd as "constant" when it's really the two relative to each other. Vcc is only changing relative to Gnd because we think of it that way, rather than Gnd increasing negatively relative to Vcc. \$\endgroup\$ – Jason S Jan 9 '11 at 3:16
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Wikipedia says:

Many control signals in electronics are active-low signals (usually reset lines, chip-select lines and so on). This stems from the fact that most logic families can sink more current than they can source, so fanout and noise immunity increase. It also allows for wired-OR logic if the logic gates are open-collector/open-drain with a pull-up resistor. Examples of this are the I²C bus and the Controller Area Network (CAN), and the PCI Local Bus. RS232 signaling, as used on some serial ports, uses active-low signals.

Hope this helps.

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    \$\begingroup\$ As to why sinking is easier, it's because N-channel MOSFETs (used to sink in CMOS) have better carrier mobility (electrons flow better than holes) \$\endgroup\$ – Nick T Dec 8 '10 at 16:27
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    \$\begingroup\$ I'm not entirely sure on this; most ICs nowadays can sink ±20mA, and does it really matter? 4.7k (typ.) is going to be less than 1mA which most ICs can do. \$\endgroup\$ – Thomas O Dec 8 '10 at 16:43
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    \$\begingroup\$ @Thomas - 'Sinking ±20mA' is not an accurate way of stating what happens. The source and sink currents go through separate transistors, which have different specs for a given chip area. \$\endgroup\$ – Kevin Vermeer Dec 8 '10 at 18:09
  • \$\begingroup\$ @reemrevnivek - Sorry, my mistake, I guess sinking/sourcing is more appropriate. But either way, they can sink and source a lot of current. \$\endgroup\$ – Thomas O Dec 8 '10 at 19:09
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    \$\begingroup\$ even if today's parts are more robust, by now it may just be convention. \$\endgroup\$ – JustJeff Dec 8 '10 at 22:34
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In addition to Igor's answer, there are two minor reasons why active-low signals are used:

  • In addition to the amount of sink current available being higher than source current, it is easier for TTL circuits to produce a voltage that is close to ground (just a Vce drop) than a voltage close to Vcc (Vbe drop + usually a little more).

  • It is easier for external passive circuits (e.g. pushbuttons or limit switches) to safely produce an active low signal: just use a pullup resistor on the receiving end, and on the external source end, short the circuit node in question to the ground potential. If you use an active high signal, you need to make Vcc available to those external circuits, which carries a risk of the Vcc node being shorted to ground.

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Sinking more at low levels, and active-low signals in general dates back to the days of TTL - now it's just a common convention. There is no reason to change it.

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It's not uncommon for different parts of a system to be powered by different supplies which share a common ground. This may be because some parts need 3.3 volts while others need 2.0 or 5.0, because some parts may need to be powered on and off separately from others, because some parts may generate a level of electrical noise on their supplies which other parts would be unable to tolerate, etc. In some cases, the circuitry which generates a reset may not operate or be controlled by the same supply that operates the CPU. Having the reset generator on a different supply from the CPU is not a problem if one is using an active-low reset and either the CPU can tolerate voltage levels above VDD or the reset line can be weakly pulled high by something attached to the CPU supply.

As a simple example, imagine a 3-volt CPU which is interfaced with 5-volt chips. The external circuitry will malfunction in arbitrary fashion if VDD drops below 4.75 volts and would require reinitialization after voltage rises above that point. The CPU itself might be able to run code just fine if the main supply voltage drops to 3 volts, but might not be able to do anything useful; the cleanest way to ensure that the external hardware will get initialized after VDD rises above 4.75 volts will be to reset the CPU whenever VDD is below that point. Using an open-collector reset chip and a passive pullup to the CPU's VDD would be the simplest approach.

About the only disadvantage to that approach of handling reset is that a passive pull-up will consume current continuously while the system is in reset. In systems powered by mains, energy storage devices [capacitors] expect to be drained completely dry without damage. In systems powered by rechargeable batteries, however, draining current from a discharged cell may cause excessive wear. Even in systems powered by disposable batteries, continuous current draw may undesirably increase the risk of batteries "venting" [spewing goo].

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