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I am using timer1 as my 100 ms interrupt clock timer. I don't use hardware WDT, I do this myself. Can I sleep (or idle) the processor and just wake up when the 100 ms clock interrupt goes off? If so, how do I do this?

I have read the section of the data sheet on power managed modes but am not sure if this will work (and actually save current usage). I am using the 100 ms clock for accurate timing and reporting to a server and am also concerned that sleep/wakeup cycle will add a few clock cycles to the interrupt timing. Additionally, I am using SPI for communications with an SiLABS radio transmitter and I get an interrupt when it gets a packet.

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    \$\begingroup\$ What do you mean by "CCS"? Is that your compiler? \$\endgroup\$ Jul 23, 2013 at 16:07

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The datasheet is quite clear on this. Timer 1 can be run externally while the processor is in sleep mode, and a rollover can cause the processor to wake up. This wakeup can be simply continuing execution after sleeping, or can cause a interrupt.

Of course the timer can't be run from the instruction clock since that is not running during sleep. Timer 1 has the special feature that it has the driver for a low power watch crystal built in. These are usually 32768 Hz and take very little power to operate.

To get 100 ms wakeups, you will have to set the timer to a specific value at each wakeup. Note that for no long term error (other than the crystal error), you need to dither between two value because 32768 Hz does not evenly divide by 10 Hz. Set the timer to the new value immediately after wakeup, and this should be no problem. You have over 30 µs before the next tick, so that is plenty of instructions to reset the timer to the right value to cause the next event 100 ms later.

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