Why put a resistor in series with signal line?

Question

A lot of times in circuits I see a resistor placed in series in a signal line and sometimes even in series with an MCU's VDD line. Is the intention of this to smooth out noise in the line? How is this different from using a small cap, like a .1µF to do the same thing?

Answer 1

Two common reasons are signal integrity and current limiting in lazy level conversion.

For signal integrity, any mismatch in impedance of the transmission line formed by a pcb trace and attached components can cause reflections of signal transitions. If these are allowed to bounce back and forth along the trace reflecting off the mismatches at the end for many cycles until they die out, the signals "ring" and may be misinterpreted either by level or as additional edge transitions. Typically an output pin has a lower impedance than the trace and an input pin a higher impedance. If you put a series resistor of value matching the transmission line impedance on the output pin, this will instantaneously form a voltage divider and the voltage of the wavefront traveling down the line will be half the output voltage. At the receiving end, the higher impedance of the input essentially looks like an open circuit, which will produce an in-phase reflection doubling the instantaneous voltage back to the original. But if this reflection is allowed to reach back to the low-impedance output of the driver it would reflect out of phase and constructively interfere, subtracting again and producing ringing. Instead it is absorbed by the series resistor at the driver which is selected to match the line impedance. Such source termination works pretty well in point-to-point connections, but not so well in multipoint ones.

Current limiting in lazy level translation is another common reason. CMOS IC technologies of different generations have different optimal operating voltages, and may have damage limits set by the tiny physical size of the transistors. Additionally, they cannot natively tolerate having an input at a higher voltage than their supply. So most chips are built with tiny diodes from the inputs to the supply to protect against overvoltage. If driving a 3.3v part from a 5v one (or more likely today, driving a 1.2 or 1.8 v one from a 3.3v source) it's tempting to just rely on those diodes to clamp the signal voltage to a safe range. However, they often cannot handle all the current that can potentially be sourced by the higher voltage output, so a series resistor is used to limit the current through the diode.

Answer 2

Yes, signal integrity is the reason. Using a cap will slow the edge down a lot and ins't as clean. The standard book on the subject is High Speed Digital Design: A Handbook of Black Magic. As a rule of thumb, 22.1 ohms is typically used as a starting point. You can use a signal integrity simulation tool such as Mentor Graphics' HyperLynx to get a better analysis before the board is built.

On the VDD line that isn't the reason. Some people might put a milliohm resistor there to measure power, then replace it with a 0 ohm for production. Others, especially analog may put an RC filter on there to get rid of noise.

Answer 3

On what kind of product? On a consumer part, it's probably for signal integrity (See Brian's answer).

On a development tool, it might be for current limiting. I often drop some 470-ohm resistors on signal lines for my projects for data lines which connect to external modules. The current drawn by a digital input isn't enough to cause a major voltage drop across this resistor. The current limiting means that nothing (usually) goes up in smoke if I make a mistake connecting stuff, or if something shorts a connection on an exposed board. It's different from a cap because a cap will draw a lot of current on a digital edge (for a short but sometimes non-negligible time), having the opposite effect of a resistor.

Answer 4

I'm not sure if this is what you're talking about, but a smallish resistor (<100 ohm) can be placed at the output of an op-amp that's driving a long line, so that the capacitive load doesn't cause the amplifier to oscillate.

It can also be used to ensure that two amplifiers have the exact same output impedance, to create a balanced line that rejects interference.

Answer 5

Two more answers:

1. Adding a resistor to a line may limit damaging current flows that would otherwise result from short high-voltage transients, such as those caused by electrostatic discharge (ESD).
2. A low-value resistor in line with the power-supply input to a chip will drop a voltage which is proportional to the chip's supply current. If one knows the value of the resistor, one can connect a meter, measure the voltage, and infer the current, without disrupting circuit operation. The circuit will work the same with or without the meter required. By contrast, if the board had a connection point for an ammeter in series with the supply, it would be necessary to short that connection whenever the mater was not present.

Answer 6

I've seen a Xilinx FPGA, programmed to drive a CMOS analog row/column multiplexor on an imager, trash the multiplexor because the sub-nanosecond Xilinx digital edges went FAR BELOW ground, and FAR ABOVE the VDD. This was observable with a 1pF probe of 900MHz speed (the TEK active fet probe P6201, long obsolete). Your normal 13pF slow probe showed no overshoot. I was directed, by people with years of experience in these areas, to place a 1Kohm resistor in each of the 6" wires (about 15 of these wires) from Xilinx to the multiplexor. Result? A fine image, with lots of offset/gain error, appeared. Some hot-cold plate correction was added, and you could see the heat of your finger soaking thru a sheet of paper. What was going on? The protection diodes, expected to absorb ESD hits of either polarity, were turning on during those sub-nanosecond under/overshoots. Thus millions of times a second, charge was injected into the CMOS substrate and wells, upsetting the digital behavior and perhaps the analog signals if those were driven to grd/rail by unexpected flow of charges needing a path back home. I've assisted in debugging other CMOS circuits, where just one logic gate was upset during an ESD test, because there was no local charge-gathering contact into well/substrate.

Answer 7

Careful with resistors on vdd lines. If you are not careful sizing the cap correctly, you may end up with ripple on the supply feed to the device which may have a detrimental effect on its operation.

Answer 8

Sometimes a resistor, or other load, is added in parallel to a discrete digital input to compensate for the distributed capacitance in a long input cable. Consider the case where a field switch at the end of a long run of shielded cable, has a hot and a return conductor. the other end of the cable pair has a 120 vac Line and the return side goes to the input of a PLC, DCS, or other digital device. Based on these values: - Supply voltage - Cable capacitance - Digital input device impedance - Digital input device ON voltage You can calculate a maximum safe distance for the cable run so that the input will turn off when the switch is opened.
The impedance of the cable, and the input device form a voltage divider that can cause the voltage at the input to be higher than the threshold, even with the switch open.