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I'm working on a project that deals with AC mains directly.

I know about maintaining proper creepage distances for adjacent tracks, and that you can add isolation slots if you lack the space to provide proper creepage.

However, is punch-through between overlapping copper layers a concern at all?

Basically, If I have a two-layer board, with a horizontal trace on the top layer carrying AC Hot, and a vertical trace on the bottom layer that is grounded, do I even need to worry about the point where they overlap, insulated only by the dielectric strength of the FR4?

What if I had a PCB where the entire top layer was a copper pour that was connected to AC hot, and the entire bottom layer is grounded? Where is the threshold of concern?

What rules of thumb (or actual standards) are used to evaluate this sort of layout?

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    \$\begingroup\$ A user thought this pdf was useful. \$\endgroup\$ – Kortuk Aug 2 '13 at 15:08
  • \$\begingroup\$ @Kortuk - A user? You mean me? \$\endgroup\$ – Connor Wolf Aug 2 '13 at 23:14
  • \$\begingroup\$ I was saving the PDF link as "someone" requested. :) \$\endgroup\$ – Kortuk Aug 3 '13 at 17:07
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IIRC. 0.4mm for a single layer of insulation. Can be thinner for two layers of insulation. UL standard assumes that there can be a defect (void) in the PCB, which can be a hole for the arc to go through. If there are two layers, then it's less likely that the defects in both of them will be in the same place.

P.S. I've looked this up last year, when I was considering a planar transformer with UL isolation. Will try to find my notes.

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