3
\$\begingroup\$

I am well aware about programming processors and microcontrollers in C. But can C code (not SystemC) be used for logic design for FPGAs? Are there any specific software tools for this purpose?

\$\endgroup\$
  • 1
    \$\begingroup\$ In the end, FPGA require some HDL language. I'm not sure how good the [language] to HDL compilers/converts are, but the thing is, that its all HDL in the end. C is a programming (software) language. HDL is a hardware descriptive language (not software). \$\endgroup\$ – efox29 Jul 28 '13 at 16:55
9
\$\begingroup\$

Yes, it is possible to do high level logic (HLL) design using C or C-like languages. Here is a list of the more popular software tools:

Keeping track of them is made difficult by the fact that these companies regularly swallow each other whole, change names or discontinue products entirely.

It looks like for all tools, the C code needs to go through an intermediary HDL stage. So the design will be translated into Verilog or VHDL, and these tools facilitate the transition before it is finally put into hardware. But remember, Verilog and VHDL themselves are intermediary stages. Even the netlist is intermediary. The final stage will be a proprietary binary file which reconfigures the FPGA. Designing in C will have its own challenges and trade-offs. But the answer to the question is a resounding yes, logic design in C can be done.

A nice introduction to C-to-FPGA was written way back in 2005. Wikipedia has a nice list of HDLs and tools. Currently, there are also tools for languages similar to C, C++, Java, Python and Ruby. Please comment if I missed a tool and I will add it to the answer.

\$\endgroup\$
6
\$\begingroup\$

No, FPGA's cannot be programmed in C. Over the years there has been various attempts at a C-Like language, but these have either not caught on failed outright. Even for the ones that "succeeded" I would not call them real C. You could not, for example, take a pre-existing code intended to be compiled for a processor and recompile it for an FPGA and expect it to work.

Use VHDL or Verilog, you'll be much happier.

\$\endgroup\$
  • 4
    \$\begingroup\$ This is incorrect, there are tools for logic design in C. Whether they are useful, or use "real" C is just opinion. \$\endgroup\$ – travisbartley Jul 29 '13 at 2:25
  • 1
    \$\begingroup\$ @trav1s Opinion, maybe, but a solid opinion. Impulse, for example, says that "Those portions that are being moved to the FPGA as dedicated hardware are constrained in the level of C that can be written..." Both Impulse and ROCCC work on "untimed C" (no clock timing is specified in the code), and it is unclear if you can have "timed C". It almost appears that all of the products you mentioned are geared to accelerating DSP type algorithms and not for designing generic logic. While I have not done exhaustive research, it appears that you can't do simple logic like a UART with these tools. \$\endgroup\$ – user3624 Jul 29 '13 at 4:00
1
\$\begingroup\$

If your goal is to run a system ON the FPGA running C, you might try installing a CPU core. However, this negates the purpose of the FPGA.

Using C for programming FPGAs would be a rather poor design choice, since C is designed for iterative programs, not logic arrays. Verilog and VHDL are designed such that you create a structure, not a list of instructions.

\$\endgroup\$
  • 1
    \$\begingroup\$ Well, as the logic gets more complicated and the FPGAs getting larger and cheaper, it is natural to use C as the programming language for FPGAs, I would not call it a poor design choice, since you can do VERY large FPGA design using C that is much neater and smaller and easier to manage than Verilog or VHDL. Of course, it has it problem as well, bad C code can create really bad HDL and FPGA implementation, but that goes with evey programming language. \$\endgroup\$ – FarhadA Jul 29 '13 at 10:06
  • \$\begingroup\$ C is not a language for construction. I agree that verilog is not the ideal language, but C is far worse. There is very little to gain. C is designed for ITERATIVE programs. This means that anything you put in your FPGA will have to simulate an ITERATIVE process, rather than the ideal parallel structure that FPGAs are best at. Using C for FPGAs is a ridiculous waste of resources. Now, a new, C-style language, designed for the needs of FPGAs, would not be so bad. \$\endgroup\$ – William Shipley Aug 15 '13 at 3:37

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.