I want to construct a matrix of smart boards that receive ethernet packets, decode them, and place the decoded results onto a memory "matrix" for other boards to process and re-transmit. Given the available technologies, I suspect PCIe is the way to go. I have a couple of questions for you all:
1) Who controls the PCIe bus? I suspect its the (PC) motherboard processor at a high level, and the PCIe controller at a lower level, but its not clear.
2) Is PCIe designed for lots of small transfers, or a fewer number or larger transfers? I suspect the latter, as the former would kill the motherboard cpu...
What do you think?