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Why are the bit-fields in the register not sequential? For example, consider an 8 bit register X . X will have bits 0-2 with flags and 3-6 may be reserved and bit 7 may again represent some flag. Why not use bits 0-3 and leave 4-7 as reserved?

For a practical example, look at the LSM303DLHC datasheet. Register CTRL_REG6_A has the following mapping:

CTRL_REG6_A register:

  • 7: I2_CLICKen
  • 6: I2_INT1
  • 5: I2_INT2
  • 4: BOOT_I1
  • 3: P2_ACT
  • 2: --
  • 1: H_LACTIVE
  • 0: --

Bits 0 and 2 are unused.

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    \$\begingroup\$ What are you talking about? \$\endgroup\$ – travisbartley Jul 30 '13 at 8:29
  • \$\begingroup\$ I second travis's confusion. \$\endgroup\$ – John U Jul 30 '13 at 8:37
  • \$\begingroup\$ Context-free question: Please engage mind-reading mode. :-) \$\endgroup\$ – Anindo Ghosh Jul 30 '13 at 8:54
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    \$\begingroup\$ Well, in my imagination, he is talking about a processor's status register. In this hypothetical processor's hypothetical status register, the bits are used as described in the question. But WHY would the hypothetical designer of the hypothetical processor choose the hypothetical status register's hypothetical bits to have that particular hypothetical order? That is the question. \$\endgroup\$ – travisbartley Jul 30 '13 at 9:02
  • \$\begingroup\$ Sorry if I was not clear earlier. All I wanted to know is why there are gaps in register bits or why reserved bits in middle and not in sequence. \$\endgroup\$ – kartik Jul 30 '13 at 9:41
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Register layout is generally determined by the hardware designer. There's usually a reason for unused bits - most likely first:

  • Functionality from an earlier design was removed, the bit flags are now reserved to avoid confusing old revisions of software (backwards compatibility).
  • To leave space to implement behaviour in future revisions. Or indeed the bits may hide features implemented (perhaps partially) that will only be documented in the next revision.
  • Undocumented bits may be driven by signals only useful for testing/debugging so cannot be publicly documented without exposing implementation details. For instance they may read internal state machine encodings or unexpected condition flags.
  • Unused bits may simply be there for data alignment. Some CPUs may be faster processing fields where related bits are packed to byte alignment.
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  • \$\begingroup\$ These are all fine and dandy, but they assume a rational designer. Without knowing what design we are talking about, the reason for the register placement could be anything; its arbitrary. \$\endgroup\$ – travisbartley Jul 30 '13 at 9:23
  • \$\begingroup\$ Registers' layout will, in general, be defined by the architect of the system (unless these registers are for internal usage, in which case I don't see a reason for leaving "reserved" fields). Except for that, +1 for a good answer \$\endgroup\$ – Vasiliy Jul 30 '13 at 9:32
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In many cases, it can be useful to have bits with certain types of functionality arranged either consecutively or regularly spaced. Suppose a 32-bit microcontroller has three widgets A, B, and C, each of which has five associated control bits V, W, X, Y, and Z. If the five bottom bits controlled the functions for A, the next five for B, and so forth, then if a future enhanced version of the chip added another function U to each widget the control bits for those functions would have go in some "odd" place relative to the first five. If the bottom three bits represented function V for each widget, the next three bits function W, etc., one could continue the pattern with a new function U, but adding a new widget would require its control bits to go in an "odd" place relative to the first three.

Suppose instead one uses bits 0-4 for widget A, 8-12 for widget B, and 16-20 for widget C. One could then easily add up to three more bits for each widget while keeping the bits for each widget together, and could easily add another widget while continuing the same pattern. Even if one added a fifth widget, one could spill that into the next word address. Code which wants to access multiple widgets at once would have to deal with the fact that there's now more than one group, but code which just wants to use one widget may be able to use byte addressing.

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