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Let's take the simplest RC circuit imaginable:

schematic

simulate this circuit – Schematic created using CircuitLab

Now I think I properly understand why the voltage rises slowly after the leading edge of a pulse--the capacitor acts like a variable-resistor turning the circuit into a voltage divider. R1 delays the time it takes to charge the capacitor, and while it accumulates charge, its resistance slowly increases, changing the balance in the voltage divider to increase the voltage to OUT.

However, I don't understand why, in a situation where OUT is presumably much lower-impedance than R1 (e.g. OUT's a short), when the clock goes low the cap doesn't dump all its charge through OUT as fast as it could with a short. I understand that OUT is not usually a short and so does actually have some resistance, which means the charge has to flow out of the cap somewhat slower and is divided proportionally between R1 and OUT's load. But does this non-trivial resistance of OUT really account for all or even a significant portion of how slow the voltage decays? Or am I not considering some other effect?

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  • \$\begingroup\$ Wrong thinking - the capacitor does not act like a variable resistor and its 'resistance' does not change. \$\endgroup\$ – JIm Dearden Jul 31 '13 at 9:15
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    \$\begingroup\$ You're halfway on the right lines: if out is a short, then the voltage at that point is always zero. The "normal" case is where out is a high-impedance input of something else, such as an amplifier or voltmeter. \$\endgroup\$ – pjc50 Jul 31 '13 at 9:32
  • \$\begingroup\$ (hence the use of an amplifier in Sallen-Key filters to guarantee that your filter drives a high impedance) \$\endgroup\$ – pjc50 Jul 31 '13 at 9:35
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    \$\begingroup\$ @pjc50: Ok, so if I understand you correctly, I think that's more-or-less a "yes, but most OUT's are actually higher impedance than R1." I don't really understand Sallen-Key filters (since op-amps are still a bit mysterious to me), but your second sentence basically highlights my mistaken assumption--that OUT was usually a low-impedance input in practice. Thanks! \$\endgroup\$ – 0x24a537r9 Jul 31 '13 at 10:05
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    \$\begingroup\$ @PhilFrost I don't think that link is inconsistent with what I was saying in my last comment to Jim--I'm only claiming a single side stores charge. The capacitor as a whole stores a charge "imbalance", aka potential, aka energy--but still has a net charge of zero in the system. Or am I misunderstanding your point? \$\endgroup\$ – 0x24a537r9 Jul 31 '13 at 18:16
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OUT is simply a label so that the simulator can assign a voltage at that point. It is not part of a charging/discharging circuit.

The basic rule of capacitor charging is that you cannot instantly change the voltage across a capacitor (unlike a resistor). The capacitor in your circuit starts off with no energy and has 0V across it. So OUT will show as 0V. On the rising edge of the input the full voltage of the pulse appears across the 100R resistor. If the step voltage is V then the initial (charging) current will be V/100 amps. As the energy stored in the capacitor increases the voltage across it will increase (Vc). This reduces the size of the current (V - Vc)/100 amps. It is this increase in capacitor voltage that produces the characteristic exponential charging curve.

enter image description here

It will take ONE TIME CONSTANT (C x R) to reach about 67% of the final value.

When the input pulse returns to 0V the capacitor will start to discharge through the 100R resistor.

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  • \$\begingroup\$ Re: draining through R1: what about when OUT is actually connected to something (as it will be in practice)? Can we ignore it because it's normally a very high-impedance circuit and so most of the draining does happen through R1 (which would discharge as slowly as it charged)? If so, is it then correct to say that, were OUT replaced by a very low-impedance circuit (compared to R1) the voltage across the capacitor would drop much more rapidly than across R1? \$\endgroup\$ – 0x24a537r9 Jul 31 '13 at 9:59
  • \$\begingroup\$ @0x24a537r9 OUT is a label (a point in the circuit). If you add a resistance, R, from OUT to ground (0V) then it will appear in parallel with the 100R resistance to discharge the capacitor. It will also slow down the charging of the capacitor as the final voltage will be V*R/(100+R). If R was very small, a short circuit, the capacitor would never charge. \$\endgroup\$ – JIm Dearden Jul 31 '13 at 10:14
  • \$\begingroup\$ Ok. Makes sense. I guess my uncertainty came from my incorrect assumption that RC circuits are analyzed as though connected to a low-impedance input. Now, remembering that very-high-impedance inputs are basically the same as not-connected-to-anything (which you're suggesting), I can see how that makes more sense. Thanks! \$\endgroup\$ – 0x24a537r9 Jul 31 '13 at 10:30
  • \$\begingroup\$ They are analyzed as connected to an infinitely low impedance input, but an infinitely high impedance output, unless other characteristics are part of the circuit being analyzed. \$\endgroup\$ – Chris Stratton Jul 31 '13 at 19:20
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The key to the problem is the assumption that OUT, if it is connected to anything at all, is connected to an input which has a high impedance. How high? High enough that the impedance is such a light load that it makes only a negligible difference in the operation of the RC circuit.

Yes, if OUT has a low impedance, then basically it reduces the effect of the capacitor (at all frequencies where that impedance is significantly lower than that of the capacitor).

If OUT is a short to ground, then the capacitor is out of the picture, and there is no charging and discharging!

However, output nodes are rarely designed with the assumption that the input has a low impedance; in particular with passive networks like this.

Usually in a circuit diagram like this, where no load is shown, it is assumed that OUT faces a sufficiently high impedance that it doesn't matter.

We take the diagram at face value, assume that OUT is unloaded, and look at the unloaded voltage on OUT.

If there is supposed to be a signficant load, then this should be added to the diagram, or otherwise documented or understood from context. (For instance, we can often infer from the schematic of some audio power amplifier that it can drive an 8 ohm load, without the load being shown).

If an output faces a zero ohm load, then it should be a current-driving type output, and not a voltage output: a voltage source facing zero ohms is a degenerate situation.

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the capacitor acts like a variable-resistor turning the circuit into a voltage divider.

[...]

...while it [C1] accumulates charge, its resistance slowly increases...

This is a little bit valid, but I think maybe not quite the way to think of it, at least if you are considering the time domain. It's quite common to think of capacitors as "variable resistors" where the "resistance" is a function of frequency, but not time. This is the basis of AC circuit analysis, and in this case it would be properly called reactance or more generally impedance, not resistance. However, the wording of your statement, especially the second part of what's quoted above, suggests this is not what you had in mind.

First, think about what resistance means. There's Ohm's law:

$$ V = IR $$

or equivalently:

$$ R = \frac{V}{I} $$

And there's the definition of the ohm:

$$ \Omega = \frac{V}{A} $$

So, resistance relates how much current you get for some voltage. Often, such as when we are talking about the input resistance to a circuit, we generalize this to just the change in voltage and current:

$$ R = \frac{\mathrm{d}V}{\mathrm{d}I} $$

We consider just the change, and model any constant offset with an ideal voltage source. See Thévenin's theorem.

Anyhow, consider that your RC circuit is a black box. Consider that the voltage across the capacitor is 0V, and you change the input voltage from 0V to 1V. The current will change from 0A to 0.01A. So, the input resistance is:

$$ \frac{\mathrm{d}V}{\mathrm{d}I} = \frac{1V-0V}{0.01A-0A} = 100\Omega $$

Now you leave this thing running for a while. The voltage across the capacitor has reached 1V, and there's no input current. Now you change the voltage from 1V to 0V. The current will change from 0A to -0.01A. So, the input resistance is:

$$ \frac{0V-1V}{-0.01A-0A} = 100\Omega $$

What if the capacitor starts charged to 1V, and we change the input voltage from 0V to 1V? The current will start at -0.01A, and end at 0A. So:

$$ \frac{1V-0V}{0A-(-0.01A)} = 100\Omega $$

In fact, it doesn't matter what values you pick for the change in voltage, or the initial state of the capacitor. The input resistance is always \$100\Omega\$. So if the capacitor is acting as a variable resistance, it's doing a good job of evading mathematical reasoning.

I would think of it this way: by Kirchhoff's voltage law, the sum of the voltages across the resistor and the capacitor must equal the input voltage:

$$ V_{in} = V_{R1} + V_{C1} $$

which means that the voltage across R1 is the input voltage, less the voltage across C1:

$$ V_{R1} = V_{in} - V_{C1} $$

If \$V_{in}\$ had been 0V for a long time and is suddenly 1V, then \$V_{C1}\$ will at that instant be 0V, and \$V_{R1}\$ must be 1V. The current through R1 is still given by Ohm's law, into which we can substitute the previous equation:

$$ I_{R1} = \frac{V_{R1}}{R_1} = \frac{V_{in}-V_{C1}}{R_1} $$

So what's really happening here is that as time goes on, \$V_{C1}\$ approaches \$V_{in}\$, thus reducing \$V_{R1}\$, thus reducing the input current, thus reducing the current available to further charge/discharge C1. There's no resistance changing here. What's changing is the voltage across R1.

Assuming, of course, that the output current is negligible, which is only true when it's connected to a high impedance. As you have the circuit drawn, it isn't connected to anything, which is an infinite impedance, and current is 0A, so this assumption holds.

You will further notice that if the input voltage is changing quickly relative to how fast C1's voltage can change (which is limited by the current, which is limited by R1), then C1 never has much opportunity to catch up with the input voltage, and so never has much of a chance to oppose it. Thus, if you consider the AC voltage and current, then C1 does less to impede the input current if the input frequency is high than it does if the input frequency is low. This is the basis of AC analysis, and leads us to the concept of capacitive reactance:

$$ X_C = \frac{1}{2\pi fC} $$

Here, you can see that the reactance of a capacitor depends on the frequency \$f\$, so if you are viewing this RC circuit as a low-pass filter, C1 can be viewed as a variable impedance as a function of frequency:

$$ X_{C1}(f) = \frac{1}{2\pi f (1\mu F)} $$

By forming a frequency-dependent voltage divider, a filter is formed. However, this is quite different than the time-domain statement made earlier, "while it [C1] accumulates charge, its resistance slowly increases."

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  • \$\begingroup\$ Your are overlooking that the impedance of the capacitor is a function of the complex frequency of the input signal - factor that in, and the logic behind the behaves as a variable resistor simplification makes sense. This is what makes impedance-method analysis of AC circuits possible. \$\endgroup\$ – Chris Stratton Jul 31 '13 at 19:14
  • \$\begingroup\$ @ChrisStratton functions as a variable resistor as a function of frequency, sure. But that's not what the OP was saying; he was saying it functions as a variable resistor as a function of time. AC analysis doesn't factor into it, as I understood it. \$\endgroup\$ – Phil Frost Jul 31 '13 at 20:00
  • \$\begingroup\$ @ChrisStratton do edits make the distinction more clear? \$\endgroup\$ – Phil Frost Jul 31 '13 at 20:26
  • \$\begingroup\$ Interesting. The bit about AC effects was especially enlightening. Thanks for the detail! \$\endgroup\$ – 0x24a537r9 Aug 1 '13 at 4:37

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