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CircuitLab has [used to have -- they have changed their symbols since this question was asked] these goofy things:

schematic

simulate this circuit – Schematic created using CircuitLab

My eyes are much more accustomed to these:

enter image description here

...with the simpler versions on the right used really only in the context of CMOS ICs.

I don't think I've ever seen CircuitLab's symbols used in the wild. In fact, doing a Google image search for MOSFET seems to turn up just one occurance of CircuitLab's symbols, which appears to be an adaptation of Wikipedia's image.

Am I totally off my rocker here? Are these symbols some crazy European convention I know about or did CircuitLab select them just to annoy me?

The image notes on Wikipedia suggest these symbols come from Sedra and Smith, "Microelectronic Circuits", but not having that book, I don't know what justification it gives, if any, for new symbols. Can anyone shed some light?

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    \$\begingroup\$ Is there a question here, or are you just whining? As long as the new symbols are unambiguous, they are usable, quicker to draw, and the notation is more analogous to BJT symbols. You are free to use them or not as you please. \$\endgroup\$
    – Dave Tweed
    Aug 3, 2013 at 12:58
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    \$\begingroup\$ @DaveTweed, I find this question totally legitimate. Phil asked whether these symbols common, whether they are special to some geographic are, and whether there are additional value in using these symbols (as compared to ones he is accustomed to). \$\endgroup\$
    – Vasiliy
    Aug 3, 2013 at 13:28
  • \$\begingroup\$ I don't see any reason for downvote here. If you did not understand the question - ask for clarifications \$\endgroup\$
    – Vasiliy
    Aug 3, 2013 at 13:29
  • \$\begingroup\$ @DaveTweed yes, there is a question, at the start and the end. Why does circuitlab use these symbols, where basically nothing else does? And, given that the only other use of these symbols is that book, what does that book say about them? \$\endgroup\$
    – Phil Frost
    Aug 3, 2013 at 14:12
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    \$\begingroup\$ I think these symbols are standard for CMOS IC texts (see Razavi, Gray & Meyer, etc.). But given CL's aesthetic, they probably wanted the cleanest symbol they could get. \$\endgroup\$
    – mng
    Aug 3, 2013 at 19:20

3 Answers 3

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I don't know exactly what CircuitLab's designers were thinking, but Sedra and Smith have a three-part figure (number 5.11 in the 6th edition of the textbook) introducing/showing their MOSFET notation, followed by an explanation that I'll quote entirely (for a reason that will become apparent in the end):

enter image description here

Figure 5.11(a) shows the circuit symbol for the n-channel enhancement-type MOSFET. Observe that the spacing between the two vertical lines that represent the gate and the channel indicates the fact that the gate electrode is insulated from the body of the device. The polarity of the p-type substrate (body) and the n channel is indicated by the arrowhead on the line representing the body (B). This arrowhead also indicates the polarity of the transistor, namely, that it is an n-channel device. Although the MOSFET is a symmetrical device, it is often useful in circuit design to designate one terminal as the source and the other as the drain (without having to write S and D beside the terminals). This objective is achieved in the modified circuit symbol shown in Fig. 5.11(b). Here an arrowhead is placed on the source terminal, thus distinguishing it from the drain terminal. The arrowhead points in the normal direction of current flow and thus indicates the polarity of the device (i.e., n channel). Observe that in the modified symbol, there is no need to show the arrowhead on the body line. Although the circuit symbol of Fig. 5.11(b) clearly distinguishes the source from the drain, in practice it is the polarity of the voltage impressed across the device that determines source and drain; the drain is always positive relative to the source in an n-channel FET. In applications where the source is connected to the body of the device, a further simplification of the circuit symbol is possible, as indicated in Fig. 5.11(c). This symbol is also used in applications when the effect of the body on circuit operation is not important, as will be seen later.

So they basically wanted to use an arrow for the current flow instead of writing "S" and "D"; and this applies to both their 4-pin and 3-pin representations of MOSTFETs. Although the diagram in question (perhaps amusingly although I suspect it is done for reasons of absolute clarity) still shows the D and S labels [for parts (b) and (c)], in subsequent diagrams of the book using simplified symbol (c), those S & D labels are actually dropped. It appears that CircuitLab might have adopted these symbols for the same reason, since they don't show any letters alongside them.

Addendum: when I click on "simulate this circuit" under the first figure in the OP, it actually takes me to a page with following symbols:

enter image description here

So it appears that CircuitLab changed their mind about their (default) MOSFET symbols in the meantime! (The new ones turn out to be the IEC 60617 symbols.) Nevertheless, I suspect Sedra and Smith will press on with their notation despite this adoption setback...

EDIT: Per request below, there is indeed a later figure in Sedra & Smith (number 5.19 in the 6th ed.) introducing the p-channel MOSFET symbols:

enter image description here

The explanation for these is much shorter (as you'd expect for an analogous figure):

The circuit symbol for the p-channel enhancement-type MOSFET is shown in Fig. 5.19(a). Figure 5.19(b) shows a modified circuit symbol in which an arrowhead pointing in the normal direction of current flow is included on the source terminal. For the case where the source is connected to the substrate, the simplified symbol of Fig. 5.19(c) is usually used.

They just reverse all the arrows relative to the n-channel case. No circles are added or anything else.

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    \$\begingroup\$ The fourth edition has your symbols (a) and (c) as Figure 5.10. Symbol (b) is missing, so it must be a later addition. My edition also has similar symbols for depletion-type MOSFETs in Figure 5.20. You might want to add the depletion symbols to your answer since enhancement vs. depletion came up in the comments to Vasiliy's answer. Personally, I prefer the simpler symbols from S&S, but I can see how leaving out the body terminal would bother people. The enclosing circles just annoy me; I don't need a schematic to tell me whether I'm designing an IC or not. \$\endgroup\$
    – Adam Haun
    Jan 1, 2015 at 19:34
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I understand your confusion, but my point of view is the opposite - why to use these complicated symbols:

enter image description here

What do arrows on these symbols mean? Why the hell the gate is drawn in a punctured line? What function does this annoying circle serve? Why the Source and the Bulk are shorted on the symbol???

I'm much more confident with these guys: enter image description here

Sometimes the "arrow notation" is combined with the "circle notation": enter image description here

In is very convenient to use these symbols because the arrow indicates:

  • The Source terminal
  • The direction of conventional current

The only downside of using the most simplified symbol (without "circle notation") is that you need to remember which direction the arrow points in NMOS and PMOS - outwards and inwards respectively. However, if you remember that the current is conducted by electrons in NMOS and by holes in PMOS, you don't need to memorize such a useless information as arrows directions - it takes exactly 20 seconds to understand which device you're looking at based on direction of the flow relative to Source.

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    \$\begingroup\$ Well, the punctured line is to indicate that this is an enhancement, not a depletion MOSFET, and the source and the bulk are shown shorted because they are made that way. \$\endgroup\$
    – Phil Frost
    Aug 3, 2013 at 14:14
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    \$\begingroup\$ Some discrete small-signal transistors do bring out the substrate connection separately. Power transistors almost universally use a vertical structure rather than a lateral one, in which it's impossible (or at least, not useful) to separate them. \$\endgroup\$
    – Dave Tweed
    Aug 3, 2013 at 16:28
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    \$\begingroup\$ As a wise man said, MOSFETs are actually 4 terminal devices, not 3. \$\endgroup\$ Aug 3, 2013 at 16:38
  • \$\begingroup\$ Well, except for the punctured line indicating enhancement, all other features seem at least rudimentary. The fact that many transistors have built-in Source to Bulk connection does not justify adopting this as a standard. I vote for simplicity and generality :) \$\endgroup\$
    – Vasiliy
    Aug 4, 2013 at 8:20
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    \$\begingroup\$ The circles indicate the device package or envelope. For integrated circuits, you would not normally include them in the symbol. For discrete parts, you should normally include them. For example, in dual transistor packages, often one of the transistor's electrodes is connected to the envelope, and this should be indicated by a dot on the envelope in the appropriate place. \$\endgroup\$ Aug 30, 2013 at 14:29
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Here's my take on the Mosfet symbol. I'll repeat some stuff that others have said to be complete.

The circle indicates it's a package

The diode symbol indicates the P or N channel, just like a diode

The dashed lines indicate that it's an enhancement type and does not conduct without bias on the gate. The dashes imply that it does not conduct without bias

The body connection (where the arrow is connected) is shorted to the source because that's how the MOSFET is physically constructed.

The gate is separated from the conduction path in the symbol to imply that there is a gap and there is, it's the oxide layer.

The gate is located over to the source side in the symbol to imply that's where the conduction channel begins to form when an electric field is applied between the oxide layer (gate) and the conduction channel. It starts at the source side because the potential difference between the gate and source has to be overcome for the conduction channel to do it's job and start conducting current. In an N-type enhancement MOSFET, the drain is at a higher potential than the source (assume the source is grounded). The gate starts off at zero volts, the same as the source. The source refers to real current flow of electrons (negative to positive) Rather than current flowing from positive to negative as is done in circuit analysis. The drain is where all of the current drains out of the MOSFET.

With the gate at zero volts (same as the source in this example) and the voltage on the base increasing, this begins to attract electrons into the conduction channel and fill the conduction channel. Once the conduction channel has enough electrons in it, current (electrons) can flow from the source to the drain as the source (n-type) and the conduction channel are now both n-type due to the electric field induced by the gate. Current (electrons) flow from the source to the drain because the source is at a lower potential than the drain and the electrons can flow from source to drain because the conduction channel is n-type as well

enter image description here

Digikey has a great video that describes how an N-channel MOSFET works

https://www.youtube.com/watch?v=F485AB1B1_Y&ab_channel=Digi-Key

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