This is a follow on question from here: Simple Audio Amp for FPGA audio to PC in which I'm trying to get audio from an FPGA -> delta-sigma DAC -> op-amp -> Line Level.

Following the advice given in the above mentioned question, I've come up with this:


By explanation:

  • Left side of circuit connects to 3.3V output pin on the FPGA
  • The 3.3K and 4.7nf form a simple RC filter as part of the delta-sigma DAC
  • The opamp is half of an opa2314

I've connected the RHS to microphone input on my PC and it records quite well, however...

I'd prefer to connect this to line-in. I've tried many different values for the two other resistors, including putting a 10K pot in for each, but can't seem to get enough gain for a line in signal.

Am I missing something, or am I simply hitting the limit of what this op-amp can do?

  • \$\begingroup\$ Is your pc setup for recording line inputs? \$\endgroup\$
    – Andy aka
    Commented Aug 5, 2013 at 7:33
  • \$\begingroup\$ What are you actually expecting? It looks like you are expecting a 10kHz LPF followed by a gain of 80 ... in which case it won't work. \$\endgroup\$
    – MikeJ-UK
    Commented Aug 5, 2013 at 7:48
  • \$\begingroup\$ Check this out: windows.microsoft.com/en-us/windows-vista/… \$\endgroup\$
    – Vasiliy
    Commented Aug 5, 2013 at 7:57
  • \$\begingroup\$ What level of peak-to-peak voltage are you seeing at the input, the - terminal of the opamp, and the output? \$\endgroup\$
    – pjc50
    Commented Aug 5, 2013 at 9:20
  • \$\begingroup\$ @Andyaka Yes, there's a gui for specifying the jack as line-in or microphone. \$\endgroup\$ Commented Aug 5, 2013 at 11:42

2 Answers 2


Imagine two scenarios: an AC signal which has such a high frequency that the 4.7 nF capacitor appears as a short. And a signal whose frequency is so low (or DC) that the 4.7 nF capacitor is open.

Signal that is blocked by the capacitor (i.e. that is in your filter's low pass band) sees a gain of \$-8/3.4\$.

Signal that is shorted to ground by the capacitor sees even less gain, because the inverting stage is a current-to-voltage amplifier, and flow through the capacitor robs the input of current.

So basically your amplifier tops out at a gain of \$-8/3.4\$ gain.

You might be thinking that there is somehow a gain of 80 due to the ratio between the 8K resistor and the 100 ohms. But that's not how it works! When you consider the input to be at the 100 ohm resistor, then you have to regard the 3.3K on the left as a source impedance. That source impedance matters because it restricts the current that flows to the current-to-voltage amp. The gain formula for an inverting stage assumes zero source impedance!


If you want to see what this circuit does to a decent approximation, with a given op-amp, you can simulate it in Circuitlab or (perhaps preferably) in something like LTspice.


simulate this circuit – Schematic created using CircuitLab

Here's the response:

enter image description here

The gain is flat at 7.432dBV (2.35) up to a bit over 100kHz. It peaks at 117kHz at about 4.9. and then drops steadily.

If you simulate the noise of the op-amp you should find a peak related to the angular frequency of \$ 1 \over C1 \cdot ( R1||R2)\$, about 349kHz.

If your intention is to have a low pass filter followed by a gain stage, you can add an op-amp voltage follower to the low pass filter (R1/C1) and have the output drive R2.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.