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I'm using a DAC with an exposed pad (NC) bottom. The datasheet specifies that the EP should be connected to ground ([EDIT]Presumably [/EDIT] for heat dissipation, but heat concern is not noted in the data sheet ) but is not connecting internally in the IC, and since the DAC is my only mixed signal component it is my star ground point as well, I'm connecting it to the analog ground plane in the board.

My question is about the best practice when it comes to exposed pad connections. Specifically when it comes to attaching the IC ground and the power supply decoupling is it ok to connect the ground pin and decoupling cap through the Exposed pad to ground or is it better to have individual vias for the decoupling and ground connection?

To Illustrate:

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vs

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  • \$\begingroup\$ I guess the fact that its a mixed signal IC is not relevant once I formulated my thoughts into a question, leaving it in because maybe there are differences in practice between digital-only IC's and mixed signal devices \$\endgroup\$ – crasic Aug 13 '13 at 21:49
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It really depends on how many layers your board will have.

If you have more than two layers, it will almost always be better to drop vias down to the ground plane and then have decoupling caps right underneath the ic on the opposite side of the board

If you are just doing two layers, then it is best to connect the EP, assuming there is only one ground (not separated analog and digital grounds), to the GND pins as well as place decoupling as close as possible to those pins. I wouldn't recommend routing the GND out any other ways (out a corner of the package) just because this can get pretty hairy and is not the most ideal in regards to parasitics.

If you do have separate grounds, make sure to connect yours to a signal ground, and NOT power ground. Power ground is very very noisy.

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  • \$\begingroup\$ Hm, whats the best practice for putting decoupling caps on the back. Pull a via through your power plane close to the Vcc pin, and then put the cap from that to the EP ground vias on the back? \$\endgroup\$ – crasic Mar 12 '14 at 2:43
  • \$\begingroup\$ Exactly, it doesn't entirely matter if you use a Cap->gnd plane and then EP -> Gnd plane OR if you use Cap -> GND <- EP. Just make sure it connects to the ground plane. \$\endgroup\$ – Funkyguy Mar 12 '14 at 3:36
  • \$\begingroup\$ Just to clarify, for my own sake,its considered acceptable practice to have a via between the VCC pin on the chip and the decoupling cap (A via that goes through the power plane), rather than a trace as short as possible? Does the parasitic L/C of the via have to be taken into account? \$\endgroup\$ – crasic Mar 14 '14 at 22:35
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I don't know if it is enough to have an isolated thermal pad attached as that is insulated to ambient air. A calculation of the designed thermal rise from self heating and the limits that may affect operating temperature limits and analog error limits, would determine what thermal resistance to internal ambient air is needed and thus the area of exposed copper ground needed. If thermal vias to a bottom layer ground are used, those vias would need to be calculated for thermal resistance as well.

The thermal pad also makes a good low inductance ground plane for the start of the star ground as long as digital current noise does not flow near that plane.

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