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I have a board with a device that outputs data over SPI (as slave device) and a microcontroller. The device signals that data is available (24 bits) by setting a certain pin low, around 8000 times per second. If the data is not read before the next data is available it is lost. Unfortunately the microcontroller may sometimes be busy with another task, for as much as 1-2 milliseconds.

I would like some way to read the data from the device whenever it is available into a FIFO or buffer of some kind. The microcontroller can retrieve that data later when not busy. I also want to be able to do SPI read/write directly to the device when the buffer is empty. What is the best way to set that up?

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    \$\begingroup\$ There may be a few ways of doing this: DMA, use of interrupts, additional separate μC to do the buffering. What type of μC do you have? Can you have an interrupt in the middle of your 1-2 msec task? \$\endgroup\$ – Nick Alexeev Sep 3 '13 at 4:34
  • \$\begingroup\$ @NickAlexeev: It is a Cortex-M0 variant. The task is not interruptable, the cpu is completely unavailable during that. There is no SPI DMA although I am told it may be available in future revision of this uC. I'm interested in use of another chip (ideally really simple and tiny, not full uC) to do this. Thanks! \$\endgroup\$ – Alex I Sep 3 '13 at 4:48
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    \$\begingroup\$ Can you link the micro you are using? The best answer will depend on the chip's capabilities. Your description fits the Nordic Semiconductor nRF51 (including lousy SPI support), but the M0 core makes its way into all kinds of interesting devices so I don't want to assume anything. \$\endgroup\$ – markrages Sep 3 '13 at 5:30
  • \$\begingroup\$ I think @markrages is right, but I'm wondering about the possibility of a simple passthrough that converts the SPI to a protocol that can use DMA on your platform. I think it would still likely be a microcontroller, but at least you'd be avoiding shared memory. \$\endgroup\$ – Scott Seidman Sep 3 '13 at 15:51
  • \$\begingroup\$ related: New to microcontrollers…options for getting up and going cheaply which also discusses SPI and buffering. \$\endgroup\$ – davidcary Sep 29 '13 at 20:27
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I'm afraid the answer is going to be a microcontroller or other programmable device. My reasoning is as follows:

  1. The sensor is a slave device, not a master.

  2. Slave devices need an external clock to clock the data out.

  3. But only 24 clock pulses.

  4. Simple logic devices aren't generally set up to make their own clock.

  5. Therefore, the simplest solution will be a microcontroller with two SPI peripherals and sufficient memory to buffer through your maximum interrupt latency. Choose a micro with an internal clock and appropriate supply voltage for your circuit. Perhaps MSP430F5151.

Now, if your sensor was a SPI master, then you could be clever with multiplexed pins and just use a Microchip serial SRAM, setting up the write with the microcontroller, then letting the sensor continue writing into the RAM. See e.g., the Logic Shrimp logic analyzer for creative use of serial RAM parts.

Power consumption calculation with microcontroller.

By popular request, let's estimate the current draw for the MSP430 that I linked above.

MSP430 achieves low power with a switchable high-speed clock DCO, which will only need to run for the duration of the data transfer.

Let's choose 8 MHz SPI clock. 24-bit transfer will therefore take 24/(8 MHz) or 3 microseconds. From the datasheet, the DCO takes 1.6mA maximum and 6.5 microseconds maximum to start at 8 MHz. So the entire transfer takes about 10 microseconds. Each transfer takes 1.6 mA * 10 microseconds, or 16 nC. 8000 transfers / sec is 128 microamp average current. But double this, because we have to read out as well. (This is bit pessimistic, as the clock doesn't need to run during an SPI slave transaction.) So say an average current of 256 microamps.

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  • \$\begingroup\$ Interesting, I would rather like to send data from my device into memory, but the device is an SPI slave. Is there some solution smaller/lower power than a micro? Perhaps a CPLD or a tiny FPGA can be used as a SPI slave to slave bridge? \$\endgroup\$ – Alex I Sep 3 '13 at 13:57
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    \$\begingroup\$ A CPLD or FPGA could work, but doesn't present any advantage over a microcontroller that I can see. \$\endgroup\$ – markrages Sep 3 '13 at 15:19

protected by Kortuk Sep 3 '13 at 15:52

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