I am developing a digital clock and data recovery circuit and am now getting into the evaluation phase, focusing on testing the limits of the design and finding potential strengths and weaknesses. An important metric of this particular design is the tolerance to jitter in the asynchronous input signal. To evaluate this metric, I have a test setup in mind as below.
To ensure the results of the testing are meaningful, it is desirable that the jitter have these characteristics:
- Random or pseudo random
- Gaussian distribution
- Standard deviation of noise is parameterized and can be swept (JITTER CONTROL above)
This doesn't seem like an easy thing to accomplish. Is there relatively simple way to inject a controlled amount of jitter into a test setup?
What I have so far
I've given it some thought and research and I have two potential ways to implement this in hardware.
- If the test circuit transmission clock is significantly higher than the DUT, then the output can be oversampled. Then, extra samples can be added or removed from the output to inject a discrete amount of jitter. This jitter won't be perfectly gaussian due to the quantization noise. But if the test circuit's oversampling rate of the transmission data is high enough, this concern can be mitigated.
- The test setup by Kubicek et al. (below) uses an optical transmission with a variable attenuator to achieve the desired effect. Its not at all obvious to me why this would achieve the above, but a spectrum analyzer should be able to determine if it works as intended.
I understand my question omits many details about the design and test setup. This is intentional as I want to keep this as conceptual and general as possible. I want to avoid this becoming a design-specific post in favor of creating a post of permanent reference value.