I plan to design a NAND flash disk using STM32F415RGT6 (168 MHz Cortex-M4) micro-controller. Using USB3300 PHY enables the microcontroller to connect in High-speed USB 2.0 mode. Therefore, the transfer rate of the physical layer should not be an issue. There are two requirements:
- Transfer rate of the disk must be over 1 MB/s (both read operation and write operation).
- A specific algorithm must be performed on the data before transfer it to/from the NAND chip (about 1100 cycles per 16 bytes = at least 70 MHz considering the 1 MB/s rate).
1) Is is possible to achieve such transfer rate using this micro-controller? The micro-controller supports DMA enabled data transfer for its USB connection.
2) How much processing power will be left for my algorithm? Has anyone measured their idle cycles after implementing a mass storage device in a micro-controller?
I know it is possible to implement such application using FPGA but I really like to avoid it if it would be possible.