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I have 8 DDR3 chips connected to an FPGA (2 controllers) and two DSPs, where 4 DDR3 chips are connected to each of the processors. At this moment I have one VTT regulator TPS5120 on board, will that be enough? Should I include more VTT regulator each near to DDR3's?

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  • \$\begingroup\$ I don't understand the downvotes here. If more info is needed to answer the question, at least ask for it. \$\endgroup\$ – Scott Seidman Sep 11 '13 at 13:23
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    \$\begingroup\$ This is likely to be a simple "get out the datasheets and look" situation. What are the current requirements of the DDR3's, and what can the regulator provide. If they don't match up, use more regulators or a different regulator. \$\endgroup\$ – Scott Seidman Sep 11 '13 at 13:24
  • \$\begingroup\$ Yes, but the common practise is to add VTT regulator as close to DDR3s as possible, the voltage can change from one corner of PCB to the other and that is not good. I just wanted to know if there is any known good practise in this type of designs, cause I lack experience. \$\endgroup\$ – zdun8 Sep 11 '13 at 15:44
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I am using a separate VTT LDO per CPU/FPGA<->RAM pair. E.g. if I have a FPGA with two memory chips plus DSP SoC with two memory chips, I use two VTT LDOs. The problem is that if one device does a burst and the current rises, another chip burst could possibly fail if the current is too high. It is expensive, but works good.

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