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I recently assembled a little electronics toy that flashes 10 LEDs one after the other. Unfortunately I do not understand why this circuit is able to provide a clock signal- it looks to me like the CLK line would always be high.

Two out of the three sections of the diagram make sense. The part that I do not understand is the clock generator at the top. Here's what I see: The momentary switch charges C3 which then serves as "power source/time out" for the circuit. There are two inverters with what looks like a feedback line to the input. There's another inverter which eventually drives the clock. When C3 is charged there's going to be current through R4 and R1 towards the first inverter.

If the feedback line was connected to the third inverter I could see how this could be used for oscillation, but with an even number of inverters this looks more like a buffer.

However, since C3 is always going to be positive, how can the input to the inverters ever oscillate ? In other words how can the CLK line ever change ? What is that R3/D1 line for ?

Schematic

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What is that R3/D1 line for ?

Revised to correct a typo!

D1 is the feedback - when IC2A output goes low, it discharges C2 to about 0.6V. This sets IC1E o/p high, IC1D o/p low and IC1 o/p goes high. D1 is now reverse biased and C2 charges thru SW1 and R4 (100k).

Eventually C2 has enough voltage on it to make IC1E o/p low, IC1D o/p high and IC1A o/p low thus we are back to the beginning of my answer.

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  • \$\begingroup\$ @JYelton oops yes!!! \$\endgroup\$ – Andy aka Sep 12 '13 at 19:20
  • \$\begingroup\$ That answers it. Thank you Andy! I missed the fact that IC1A would be a connection to ground for C2. \$\endgroup\$ – Cross_ Sep 12 '13 at 21:19

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