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I have read the Wikipedia article Three-state logic, but it is not clear enough. What is a more simple explanation for what a three-state circuit is?

When and where do we use it? What has CMOS to do with three-state circuits?

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Normal push-pull outputs drive the output either high or low by turning one of the output transistors on and the other off. Tri-state outputs can turn both transistors off, effectively cutting off the output completely. This allows another output on the same wire to drive it either high or low without creating a short circuit between chips.

Tri-state outputs can be implemented with either BJTs or MOSFETs, so there is no direct relation between them and CMOS.

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Tri-state may be considered as the high impedance state of a digital pin, wich was born to be 0 or 1

(ideally "0" = gnd = short circuit to the ground = very low impedance) ( "1" = 5V [ttl] = short circuit to vcc).

When you define a processor pin as an input, it usually become high impedance (tri state) to listen to the arriving data, may it be a button press or serial data, pulse, whatever.

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    \$\begingroup\$ Actually trīstate refers to an output, with both N and P channel FETs turned off. \$\endgroup\$ Sep 20 '13 at 8:49

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