What are programmable logic ICs of different complexity used for?

Question

Programmable logic can be implemented in your widget in many different spectrums, from burning a few gates or using a MUX to the latest FPGA with built-in microcontroller and IO peripherals, not to mention ARM's PrimeCell GPIO or other, more specific examples. For what applications are the various levels of programmable logic device complexity used? Although the grouping appear to blend together near the extremes of their definitions, I think this is an acceptable list:

1. PAL/PLA/GAL: Programmable Logic Array; appear to be listed as 'Embedded - PLDs' at Digikey, covering asynchronous 10/8 I/O (ATF16V8C) to 50MHz, 192 macrocell, (CY7C341B), and are mostly reprogrammable.
2. CPLD: Complex Programmable Logic Device; Digikey lists them as such, available in 7.5ns 10 I/O (ATF750C) to 233 MHz, 428 I/O "CPLDs at FPGA Densities" (CY39100V484B).
3. FPGA: Field-Programmable Gate Array; available in 58 I/O (XC2064) to 1023 I/O BGA beasts (EP1S80F1508C7N).
4. FPGA with hard MCU: this is when an MCU is physically laid out in the FPGA IC, not emulated.

Wikipedia quote:

The difference between FPGAs and CPLDs is that FPGAs are internally based on Look-up tables (LUTs) whereas CPLDs form the logic functions with sea-of-gates (e.g. sum of products). CPLDs are meant for simpler designs while FPGAs are meant for more complex designs. In general, CPLDs are a good choice for wide combinational logic applications while FPGAs are more suitable for large state machines (i.e. microprocessors).

This doesn't explain the difference between using a 233 MHz, 400 I/O CPLD and a comparable FPGA; or between a 192 macrocell PLD and a comparable CPLD. I can't grep reliable guidelines by which to narrow design options. Note that I don't currently have a specific application in mind, but have often wondered, "what would I use to do that?"

I've received excellent advice off-site regarding specific requirements, but still think this question could benefit from some examples showing preference over one family of PLDs when another may have appeared to be equally or more suitable.

Answer 1

There's two criteria that you can use to evaluate a digital project that help you decide which part best matches your criteria. The first is design size/complexity - how much logic is involved. The second is the input and output requirements in terms of pin count. Speed can be factored in if you can estimate what your slowest function would be. The vendor tools (Altera Quartus II, Xilinx ISE, etc.) will help you once you get in the right ballpark.

• PAL/PLA/GAL: These are intended to replace a small to medium size circuits that you might normally implement as LSI logic chips (7400, 4000 series). These can offer better board layouts due to I/O remapping, and lots of simple logic functions. These chips contain non-volatile memory (or one time programmable fuses) and require no power-up configuration time. They may not contain data storage elements.

• CPLD: These are larger cousins of the PLA. The designs can be small state machines, or even a very simple microprocessor core. Most of the CPLD chips that I have seen do not have any on-chip SRAM, although the large Cypress CPLD you linked does. CPLDs are more likely to be re-programmable with flash memory, and they also do not require configuration time on power-up.

• FPGA: Unlike the CPLD, the logic blocks are based on SRAM instead of flash memory, resulting in faster logic operations. The major down-side with FPGAs is that since the configuration is stored in SRAM, every time the device is powered up the FPGA must load its programming into this SRAM. Depending on the size of your design and the speed of your non-volatile storage, this can cause a noticeable delay from power-on to fully functioning. Some FPGAs have on-chip flash for storing their data, but most use separate memory chips. FPGAs will often have hard-wired multipliers, PLLs, and other logic functions to improve computing speed. Large blocks of on-chip RAM is also available. You will also be able to use high-performance I/O specifications like LVDS, PCI, and PCI-Express.

• FPGA with Microprocessor Hard Core: I'm not familiar with these, but I would imagine that your design would center around the microcontroller programming, and the FPGA would augment the microcontroller. The parts you identified make it look like you would start your design with a microcontroller and a FPGA, and then combine the two into one chip/package.

How to decide which is right for you:

The best way is to have your code (Verilog/VHDL) finished, and then use the vendor's tools to try and fit it into the smallest part possible. I know Altera's tool lets you change programming targets fairly easily, so you could keep picking smaller FPGAs, and then smaller CPLDs until your design usage gets close to about 75%. If you require performance, then try to pick devices that have features (fast multipliers) that decrease the speed requirements of the logic. Again, the vendor tools will help you identify if you need to upgrade or if you can downgrade.

Another factor of which part to use is ease-of-use. Using PAL/PLA/GAL logic is probably more effort than constructing the function using discrete logic gates (74HC*, 4000, etc). CPLDs typically require only a single supply voltage, and don't require additional circuitry. They are effectively stand-alone. FPGAs begin to use multiple power supplies for I/O and the logic core, complex I/O standards, separate program memory, multi-layer (>2) PCBs, and BGA packages.

Steps to narrowing down your design requirements would include:

1. Identify all inputs and outputs for your FPGA/CPLD. This is usually an easy part of the design stage. This way you know what package you're looking at, and how close you can cut it to that margin.

2. Draw a block diagram of the internal logic. If your blocks look simple (each block would have a hand-full of logic gates and registers), then you probably can use a CPLD. If, however, your blocks have labels such as "Ethernet transciever", "PCI-Express x16 interface", "DDR2 Controller", or "h264 Encode/Decode", then you are almost certainly looking at a FPGA and using HDL.

3. Look and see if your interfaces have special I/O requirements, such as special voltages, LVDS, DDR, or high speed SERDES. It's easier to get a chip that supports it than to get an additional translator chip.

Example CPLD Applications:

• Multi-channel PWM with SPI interface
• I/O Expander
• CPU Address Space Decoding
• Clocks (Time keeping)
• Display Multiplexors
• Simple DSP
• Some simple programs can be converted into a CPLD design

Example Hobbyist FPGA Applications:

• Small System-on-Chip (SoC) designs
• Video
• Complex protocol bridges
• Signal processing
• Encryption/Decryption
• Legacy system emulation
• Logic Analyzer/Pattern Generator

For most hobbyist work, you'll be limited to relatively small FPGAs unless you want to solder BGA packages. I would choose between a large CPLD or a cheap FPGA, and the size/speed requirements would dictate which one I needed.

Answer 2

A good "rule-of-thumb" list would go something like this:

• PAL/PLA/GAL: Used in place of discrete IC logic gates on a PCB
• CPLD: Used where complex, nonDSP, and possibly time-critical tasks are required (loading boot code onto an FPGA from memory, LUT sinewave generator for DAC, etc)
• FPGA: Used when time critical, multiplication, or DSP capability is required (FIR Filters, FFTs, etc)
• FPGA with hard MCU: Used when FPGA functionality is required and peripherals on the FPGA must be accesed (temp sensors) or to allow a less-time-sensitive task to be implimented in C rather than VHDL for simplicity (UART/serial port functionality, PCB housekeeping, etc)

Answer 3

A simple answer could be that there are two ways:

1. You first design your system on high abstraction level (say HDL or schematics). Then you try to fit it into PAL/CPLD/FPGA and choose ones that satisfies your requirements (number of gates/logic-elements, performance, etc.) and then choose the cheapest one of these depending what you define cheapest (development cost vs. production cost, etc).

2. But usually before you start any HDL coding or schematic development you already can estimate the complexity of the system (how much gates do you need, if it looks like you need 8-bit MCU or 32-bit MCU, or no microcontroller at all). Based on that you can choose your programmable device as well. This would be less precise but will allow to design your non-programmable analog and digital hardware in parallel with programmable hardware and software (if any).

Answer 4

The FPGA with hard core is used since it is less area than a separate microcontroller and faster than a soft-core microprocessor. However the price is usually worst than a FPGA and a separate microcontroller. In general software and therefore a microcontroller is better for (relatively) slow and rare cases such as configuration of parameters and error handling; logic is better for continuous processes. For example in packet processing, writing to a memory should be in logic; handling time-to-live timeout should stay in software.

Within the FPGA space there are cheap/low power parts and expensive/fast parts. Generally the microcontroller is only in the expensive one; this make the cost trade vs. a discrete MCU even worse for the on-FPGA solution.

No one uses PALs in new designs, at least for 10+ years. CPLDs have taken over that niche.

In the last 5? years CPLDs are FPGA-like inside, but with memory to hold the configuration on-chip. Since FPGAs are now 100's of MHz, speed is much less of a reason to put logic in a CPLD than it was 10-15 years ago. However the FPGAs still have other features such as multipliers, serializers and many memories that may force a design into one even if it doesn't have that much logic.