I understand that a DSP is preferred rather than FPGA for an FIR filter, but my task is to implement both fixed-point and floating-point software filters (in C) for the Altera DE2. I barely know what an FIR filter is so I must learn everything but I can program C and assembly and I know the hardware well enough to program hardware interrupts and I'm beginning to handle serial communication.
Can you give me some advice how to learn and get started writing the FIR filter? The spec is that
Samples are sent from a device source by a serial interface (115200 bits/second, 1 start bit, 8 character bits, no parity bits, 1 stop bit) to the receiver port of a UART that is connected by the Avalon-bus with the Nios-core. The Nios-core shall run a program that implements a FIR-filter with the coefficients
c0 c1 c2 c3 0.0299 0.4701 0.4701 0.0299
The output samples of the FIR-filter shall be sent via the transmitter port of the same UART to another device sink.
I think I can solve the communication part (by means of the UART interface and putty(?) with a serial-to-usb cable to the DE2 board) but I'm not sure about the actual filter implementation and design. Can you help me? I want to look at designs for FIR filters to learn how to implement one.