The ARM instruction set is very powerful, and a single ARM instruction can do some combinations of things that would require multiple instructions when using many other instruction sets. This power comes at a cost, however: every ARM instruction takes four bytes to store; while ARM instructions may on average do somewhat more useful "work" than would be possible with a two-byte instruction, they don't do twice as much. Further, in a typical application there will be sections of the code which need the more powerful instructions, but there will also be large sections of the code which receive relatively little benefit from them.
The original purpose of the Thumb instruction set wasn't to serve as a complete alternative to ARM, but rather to allow the parts of the application that need the more powerful instructions to use them, while allowing the parts that don't need those instructions can be stored more compactly. Even if 90% of a program is written in Thumb mode, that portion can easily call a subroutine written in ARM mode if it needs to do something which ARM mode. Consequently, the designers were free to omit from the Thumb mode instructions set certain operations which most applications wouldn't need to perform very often even if the applications would need to do them at some times.
In its later cores, ARM has shifted away from the two-mode design, going in two different directions. Some cores like the Cortex-M3 use only a 16-bit instruction mode, but use some otherwise-unused 16-bit instruction patterns to represent the first half of a two-word instruction. This makes most ARM instructions available even within 16-bit mode. Other cores like the Cortex-M0 are mostly limited to the original Thumb instruction set, but augment it with just enough additional instructions to make it possible to do the things which would otherwise have required switching to ARM mode.
Personally, I'm somewhat sad to see ARM mode dropped. While the Cortex-M3 approach works almost as well, ARM mode could do a few things Cortex-M3 can't do as nicely. For example, in the ARM mode every instruction had a "condition" field which would cause it to execute only if certain flags were set. This made it possible to to do certain kinds of bit-permutation code using three instructions for every two bits.
; Capture bits 2 and 3 of R0 in sign and carry flags, respectively
movs r0,r0,rol #29
orrmi r4,r4,#128 ; Set bit 7 of R4 if bit 2 of R0 was set
orrcs r5,r5,#128 ; Set bit 7 of R5 if bit 3 of R0 was set
The Cortex-M3 has a rather powerful "if-then-else" instruction which can be used to make the execution of the following instructions conditional based upon flags, and it has modes to e.g. "execute the next instruction only if carry is set, and the one after that only if it's clear" but all instructions controlled by a particular "if-then-else" instruction must use the same condition flag. Consequently, the above three-instruction sequence would become five.