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I'm studying the typical circuit implementations of push pull regulator topology. I have a question about it's off cycle. When the secondary get exited on the off cycle there is a back EMF also exited on the primary too , since the transformer is symmetric this is large as the primary current of the ON cycle.And because overall flux in the core is trying to depleted through the easiest path, so then there should be a huge current flown through that reverse diode ? Am I right here?

So the internal diode of the IRF44n would lead to flow massive amount of energy throug it. Isn't it? And get the device fry, or reduce the overall efficiency of the SMPS module?

Is that mean a circuit like this is a complete flaw? enter image description here

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    \$\begingroup\$ Think of this type of circuit as a regular transformer circuit and not as a fly-back where there would be an "off" cycle. \$\endgroup\$ – Andy aka Sep 30 '13 at 12:02
  • \$\begingroup\$ so is it required to keep the duty cycle near 1 in this topology. The waveform have a state where both Q1 and Q2 are off. \$\endgroup\$ – Standard Sandun Sep 30 '13 at 12:31
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    \$\begingroup\$ As far as I'm aware Q1 "charges" the primary and then Q2 "discharges" the primary then there is (or can be) a zero/neutral state. This means max duty cycle can be 50:50 for maximum power transfer or something less for controlling a smaller power. I believe (although I've not checked) that Q1 conducts and the moment it stops conducting Q2 conducts for the same length of time. \$\endgroup\$ – Andy aka Sep 30 '13 at 12:36
  • \$\begingroup\$ which does mean Q1 Q2 cycles are not symmetric.If so the answer is acceptable. \$\endgroup\$ – Standard Sandun Sep 30 '13 at 12:41
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    \$\begingroup\$ I've looked at the data sheet and it doesn't give details - I would expect Q1 to conduct for the same length of time as Q2 and that one conduction period immediately follows the other followed by a period of time that accounts for duty cycles less than maximum. If it's not like this then I can only assume that TR1 in your diagram is acting in some kind of partial fly-back mode. \$\endgroup\$ – Andy aka Sep 30 '13 at 12:50
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Your logic is flawed. For example, when Q1 is on, the drain of Q2 is forced to +24 V by the autotransformer action of the primary winding. Similarly, when Q2 is on, the drain of Q1 is at +24 V. The body diodes of the MOSFETs are never forward-biased.

One issue that you do need to worry about is leakage inductance on the primary winding, which stores energy that does not get coupled to the secondary. This stored energy can cause the drain terminals to rise higher than 2× the supply voltage, perhaps to levels that could damage the MOSFETs. It's usually a good idea to include a circuit that clamps the voltage at the ends of the primary winding to some level between 2× the supply voltage and the Vds(max) of the MOSFETs. This could be nothing more than a pair of zener diodes that break down at, say, 30-36 V. Their power rating would depend on things like the actual value of the leakage inductance and the switching frequency.

On a project I once did, I was able to use a simpler solution. I was driving such a transformer with +175 V, but I also had a +400 V bus in the PFC circuit. I simply connected a pair of ordinary rectifier diodes between the transformer ends and the +400 V bus, effectively "recycling" the energy which would otherwise have been wasted.

Note that with the PWM that your driver uses, there are also times when both transistors are switched off. Aside from the leakage inductance issue noted above, during such periods both ends of the transformer primary sit at +12 V. This is a feedforward converter, not a flyback converter, which means that whenever current is flowing in the primary, there's also current flowing in the secondary, through the bridge rectifier. There's no significant energy stored in the transformer itself (i.e., it isn't "charged" and "discharged").

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  • \$\begingroup\$ I couldn't have put it better myself +1 \$\endgroup\$ – Andy aka Sep 30 '13 at 12:00

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