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Suppose one is designing a processor-controlled switching supply. In general, how does one properly select switching frequency vs. control loop update frequency vs. feedback sampling frequency vs. feedback anti-aliasing filter corner frequency? I think control loop update frequency should match switching frequency, and that the feedback sampling frequency should be at least the switching frequency. I also think that the anti-aliasing filter should be a lowpass that cuts frequencies above half the sampling frequency (though of course doing that perfectly is impossible). Is that accurate? If not, where am I wrong? Should the sampling frequency in fact exceed the switching frequency? Should there be some digital filtering involved as well?

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This is a broad question with whole books written on this subject, so it can only be dealt with briefly here.

For most processor-controller power supplies, switching frequency is the control loop frequency. If you have a high switching frequency and a complicated control loop, you might only run the loop every second cycle, or some small number of cycles.

Sampling the external state would be done just before each control loop iteration, at least for the important signals that are "inside" the loop, like the value it is trying to control.

As for filtering, generally filtering any feedback input to a control loop is a bad idea. Put another way, you never want to hear about output changes late. It is OK to filter other input to the control loop, like the control input, because that isn't really inside the "loop" and changing it slowly doesn't cause instability. It does reduce the overal input to output bandwidth of the whole system, but sometimes it is useful to limit the control input to the frequencies that the system can realize.

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  • \$\begingroup\$ All that makes sense. Thanks. Now, if you want to filter your feedback signals as little as possible, but you still need an anti-aliasing filter before your A/D converter (right?), does that imply that higher sampling rates allow for less filtering, and are thus better? Or would the higher sampling rate need to be countered by a digital filter, resulting in less improvement? \$\endgroup\$ – Stephen Collings Sep 30 '13 at 15:16
  • \$\begingroup\$ @Stephen: No, I wouldn't put any deliberate filter between the output signal and the A/D input. Any delay in this path decreases the stability margin. You can apply a little bit of filtering to reduce random noise, but the time constant needs to be small compared to the loop time. Generally you don't filter and live with a little random noise. The slower the control reaction, the more filtering it can tolerate. Basically you can trade off transient response with steady state noise somewhat. \$\endgroup\$ – Olin Lathrop Sep 30 '13 at 15:34
  • \$\begingroup\$ @OlinLathrop: Much of what I've learned about control theory has come after the last job I did which involved positioning large motors. Would I be correct to guess that filtering to avoid moving a motor back and forth when there's nothing much for it to do would have been better placed on the back-end than the front-end, possibly with a little feedback so that the "expected" motor motion will correspond to the control signal it was actually given, rather than the PID output? \$\endgroup\$ – supercat Sep 30 '13 at 15:47
  • \$\begingroup\$ So no anti-aliasing filter, you just live with the aliasing? \$\endgroup\$ – Stephen Collings Sep 30 '13 at 16:45
  • \$\begingroup\$ @Stephen: What aliasing exactly? What signal are you expecting to be on the readings that has a frequency more than half the pulse rate? These readings are synchronous with the pulses, so that doesn't cause aliasing. There is always some noise, but part of good design is to minimize the noise in the feedback path. \$\endgroup\$ – Olin Lathrop Sep 30 '13 at 17:54
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These are my personal opinions based on the type of switching power supply I've seen you raise questions about.

You should establish (in your own mind) that the switching frequency is chosen ONLY to suit the application's energy storage devices, its load requirements and the input supply voltage range that can be expected. This is the critical part of the design.

Once established, you then determine what duty cycle you need to map to any given condition such as load changes and supply voltage changes.

  • If your supply voltage range doesn't move quickly (why should it?) then your control system doesn't need to be fast to cope with this.
  • If your load requirements don't change quickly then the same applies.
  • You can assume that the components you have chosen don't alter their values except at a slow-rate due to aging and or self-heating.

You also need to consider how much you can tolerate as an error should the duty cycle be fixed and the power input voltage level change by (say) 5%. Ditto the load current due to load resistance changes.

From this you could implement forward error correction techniques to tweak duty cycle based on your processor measuring how much your input supply voltage moves and how much your load current is changing. This does not require fast measurements and they are not at all comparable with switching speed. This is similar to mapping an engine.

So far no relationship needed connecting ADC sampling, anti-aliasing and switching speed.

Summarizing, you have a decent core of switching components that produce the required output voltage for a given duty cycle. Most of the elements that may affect output voltage can be forward error corrected by tweaking the duty cycle. It doesn't produce a fantastic regulator but it would work reasonably well but can drift over time. No feedback yet and no chance of instability.

But the loop does need to be closed because components heat and age and the mapping of the core electrical components won't be an exact science so ask your self the question - how quickly will the output drift from the nominal given that you can forward error correct the obvious culprits?

For your type of power supply I would say it doesn't drift quickly but only you can answer that. The feedback you do implement isn't far-reaching - it's not trying to accommodate supply voltage variations or radical load changes - let the forward error correction do that - let the actual feedback system only deal with drift.

So, the final "nail" should be feedback based on what your average output voltage is doing and providing you have designed the switching elements correctly this "real" part of the control-loop doesn't need to have high bandwidth.

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