I'd like to know if it's possible to find \$V_\mathit{DSsat}\$ knowing \$k_n'\frac{W}{L} = 0.75\,\$m and \$V_\mathit{Th} = 1\,\$V? Also, \$I_D = 1\,\$A.
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\$\begingroup\$ What is W and what is L? You have an "m" after "0.75" and that's what's confusing me. \$\endgroup\$– Andy akaOct 1, 2013 at 8:04
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\$\begingroup\$ The 'm' is meant to be milli. W and L are the length and width of the substrate. \$\endgroup\$– user968243Oct 1, 2013 at 8:28
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\$\begingroup\$ W divided by L is "milli" what then? \$\endgroup\$– Andy akaOct 1, 2013 at 8:44
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\$\begingroup\$ I think I wrote it poorly: I'm trying to say that k times W divided by L is equal to 0.00075. \$\endgroup\$– user968243Oct 1, 2013 at 8:48
1 Answer
No, it is impossible to find \$V_{DS_{sat}}\$ based on the parameters you've provided.
Theory:
The most basic model for representing NMOS's current is this:
Due to the fact that both \$C_{i}\$ and \$\mu\$ are parameters of a particular technology and are constant across all the NMOSs in a given technology, it is common to replace two constants with a single one: \$k'=C_{i}\mu\$.
If you plot the above equation, you'll find something strange - it predicts a maximum of \$I_{D}(V_{DS})\$. It means that there is some \$V_{DS_{sat}}\$, and for \$V_{DS}>V_{DS_{sat}}\$ the current is decreasing! There might be two explanations to this phenomenon:
- There is some very unusual effect takes place.
- The above equation has limited validity (in terms of \$V_{DS}\$).
The second bullet is the correct one - this equation is valid up to \$V_{DS}=V_{DS_{sat}}\$. When this threshold is reached, the conducting channel underneath transistor's Gate "pinches-off" and the current does not increase anymore with increasing \$V_{DS}\$:
The names of the regions of operation appear on the graph. Linear region is sometimes referred to as "triode region".
So, how one finds an expression for \$V_{DS_{sat}}\$? Very simple: differentiate the above equation with respect to \$V_{DS}\$ and find when the derivative equals to zero. You'll get the following value:
$$V_{DS_{sat}} = V_{GS}-V_T>0$$
The last inequality represents the fact that the transistor is not in cut-off region.
Substituting this value back to current's equation, you'll find:
$$I_{D_{sat}}=\frac{1}{2}k'\frac{W}{L}(V_{GS}-V_T)^2$$
Now, back to your question:
As you can see, substituting all the given parameters into the last equation allows you to calculate \$V_{GS}\$, and, since you also know \$V_T\$, you can calculate \$V_{DS_{sat}}\$. However, this requires one additional assumption which you did not state in the question: the transistor should be known to operate in saturation region.
Otherwise, if the transistor is in linear region, you need to know also at which \$V_{DS}\$ it operates in order to be able to calculate \$V_{GS}\$ from the first equation.
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\$\begingroup\$ @Vasily it's a shame you left the answer like that - it sounds like something I could learn - maybe you could add what it takes to calculate \$V_{DS(SAT)}\$ \$\endgroup\$– Andy akaOct 1, 2013 at 20:26
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\$\begingroup\$ @Andyaka, I indeed have a record of exceptionally long answers, but in this case, the question is very straight and clear. I think it is a bit off-topic to deep dive into explanations and models while OP did not ask for any guidance or explanation at all. \$\endgroup\$– VasiliyOct 1, 2013 at 20:36
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\$\begingroup\$ @Andyaka, on second thought, I don't see a reason not to do what you're asking for. \$\endgroup\$– VasiliyOct 1, 2013 at 20:47
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