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I am trying to use the IGBT driver IR2184 to drive a H-bridge made of powerpack CM100DU-24F. Here is the circuit I built:

schematic

simulate this circuit – Schematic created using CircuitLab

a) How do you choose the value of the boostrap capacitor between Vs and Vb ? I measured only 2.5V across it, but I should get 12V. Am I right ?

b) Is there any requirement for the diode D1 ? I commute at 1Hz.

c) On the datasheet of the IR2184, it is recommended to put a capacitor between Vcc anc COM. What is its purpose ?

d) The voltage between gate and emitter of L1 is square, 1Hz, 12V. But the voltage between gate and emitter of H1 is 0V.

e) How do you choose the value of the gate resistor ?

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    \$\begingroup\$ Those are bipolar NPN transistors, not IGBTs. \$\endgroup\$ Commented Oct 4, 2013 at 12:52
  • \$\begingroup\$ He might have used a bit symbol due to what is avail. What he cites is a 1200v igbt module \$\endgroup\$
    – user16222
    Commented Oct 28, 2013 at 8:27

4 Answers 4

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Your driver IC will work with insulated gate devices (MOSFETs, IGBTs). Your Schematic shows BJTs.

BJTs require a current all the time they are on, MOSFETs or IGBTs need just a charging current into their gates and will stay on once the gate is charged. Using BJTs, your bootstrap capacitors will be discharged quite quickly.

Now...

a) The bootstrap cap needs to be able to hold its voltage without much loss when the gate of the power transistor is charged, i.e. it needs to be way bigger than the gate capacitance. 100 nF sounds good, because typical gate capacitance values are between 500 pF and 2 nF. Also, it needs to be able to hold up the supply current of the driver while it tries to keep its high output signal alive. The current will be small unless you use a BJT (see my intro above). However, 1 Hz is very slow. Assuming your CLK1 signal is symmetrical, the bootstrap caps need to supply the high side drivers for half a second. Typical PWM signals for such bootstrapped applications run at or above 10 kHz, i.e. the high or low times are 10000 times faster than in your simulation.

b) The bootstrap diode needs to be able to block the supply voltage (100 V in your case). Also, it should be of a fast switching type because it needs to block quickly once the lower power transistor turns off. Slow diodes will affect the switching behavior of the power transistors - i.e: add considerable switching losses. A 150 V / 1 A Schottky diode or a 200 V / 1 A ultrafast silicon diode sound like reasonable choices.

c) In the ideal world, your drivers' supply (12 V) will always feed the driver ICs, no matter what. A real circuit will have some inductance between the drivers' supply and the driver ICs themselves. Whenever the ICs turn on, they need to be supplied with a current spike. A local bypass capacitor will supply the fast transient (spike), and the inductance along your 12 V supply trace and its respective ground return trace won't matter much.

d) See intro and a). With BJTs, all hope is lost. With IGBTs or MOSFETs, start by checking the high side drivers' supply voltages (i.e. the voltage across the bootstrap caps).

e) Ideally, you would need zero Ohms. However, the gate capacitance (given you use MOSFETs or IGBTs) together with the source inductance (and the inductance along the gate driving path) form an LC resonant tank. This LC circuit is kept from sustained ringing by making it bad, on purpose, using a gate resistor. 10...100 Ohms may be a good idea. Anything beyond 100 Ohms is usually bad practice. Remember that your drivers need to be able to charge the MOSFETs' or IGBTs' gates fast in order to reduce the switching losses. In your example, 10 kOhms with 1 nF (as a guess for a gate capacitance) yields a time constant of 10 µs. You want your transistors to switch at least 100 times faster than that.

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The bootstrap capacitor is the (only) power supply for the high side of the gate driver. It gets charged though D1 when the lower transistor is on. So, yes, it should have 12V, minus the diode drop. D1 needs to be able to handle this charging current.

The problem you may be having is 1Hz is very slow switching frequency. You need a pretty large capacitor to supply the gate driver for one second without its voltage drooping too low. Check the data sheet for the driver to see how much current is uses on the high side supply. From that you can calculate how much capacitor you need. Don't forget to allow for the upper transistor gate charge.

The cap on Vcc is needed because when the lower transistor turns on, it has to supply both the gate charge for the transistor and the charge for the bootstrap capacitor.

The gate resistor is used to control the switching speed of the transistor. Too slow results in excessive power losses (not gonna be a problem at 1Hz). Too fast can cause noise and ringing.

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Why are IGBTs being used? Schematic shows only 100V, yet IGBTs are called out. It's best to use IGBT only when voltages are greater than 500V and power processed is in the kilo-Watts. Maybe you just want to play with IGBTs and learn about them.

a) The bootstrap capacitor is found by using C = \$\frac{\text{$\Delta $I$\Delta $T}}{\text{$\Delta $V}}\$ = \$\frac{\text{$\Delta $Q}}{\text{$\Delta $V}}\$. Here \$\text{$\Delta $I}\$ is current into IR2184 bias plus charge into IGBT gate, \$\text{$\Delta $T}\$ is the hold up time, and \$\text{$\Delta $V}\$ is voltage droop on the capacitor. Since the frequency is 1Hz \$\text{$\Delta $T}\$ is 1 second. We are going to set \$\text{$\Delta $V}\$ to 1V (allow cap voltage to change by only 1V during hold up time), so C will be the same as \$\text{$\Delta $Q}\$. Charge required by IR2184 during 1 sec is max of 150uA, and charge into IGBT gate is 1uA + gate leakage of 20uA -- for 1 second that combines to be ~170uC.

That means that the bootstrap capacitor needs to be 170uF (it's because the frequency is so low). And will need to have negligible leakage over the 1 second hold up time.

b) As far as D1: You just need a diode that can take the reverse voltage, say 150V or so.

c) The filter cap on Vcc is to provide pulsed current to the switch gates and bootstrap cap. Usually is best to have it be about 10x the bootstrap cap value, although here with such a low frequency that probably won't matter.

d) No high drive voltage because there is not enough bootstrap capacitance.

e) Gate resistance is about impedance matching. Ideally, you will want to match the characteristic impedance of the gate circuit of the switch. Resistance less than \$Z_o\$ and the gate will ring, and the switch may oscillate.

Find out gate circuit inductance, and then with the switch gate capacitance calculate \$Z_o\$ = \$\sqrt{\frac{L}{C}}\$. That will be the best case gate resistance, resulting in the fastest rise and fall times ... although in this application I'm not sure you care about that.

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The bootstrapping side seems to have been covered.

The cct symbol is for a BJT but the part in question ( CM100DU-24F ) is an IGBT (1/2 bridge module), slight additional confusion but circuitlab doesn't have a specific IGBT symbol.

The bootstrap chip doesn't seem to provide a negative gatevoltage? it is recommended (for IGBT or FET based inverters) due to being able to hold devices off during switching & dv/dt events re. the miller capacitance injecting charge into the gate. Equally bootstrapping isn't really an option if you have to operate at 100% duty.

The benefit of IGBT's over FET's isn't just the voltage, but the SOA. MOSFET's generally have triangular shapped SOA while IGBT's have almost square.

You have a link of 100V (how many amps?) so the reasoning behind using IGBT's isn't clear. 10A? why not use MOSFET's. 100A? then maybe IGBT's are a better choice. NOTE IGBT's are not limited to links > 500V as has been implied... Their choice at lower levels is subjective based upon other design criteria. 270Vdc link I would still use 1200V IGBT's simply because of other design considerations (mainly the stator current, supply transients, regen levels etc...) EQUALLY switching overshoots which can be compounded by poor powercore layout.

The drive power will be: P = Q*f*ΔV Q = gate charge, f = switching freq, ΔV = gate voltage swing.

Q must never be calculated from the IGBT or MOSFET input capacitance Cies. Cies is merely a 1st order approximation of the gate charge curve in the origin (Vge = 0V). The gate charge curve of a power semiconductor is highly non-linear. That is why the gate charge must be derived from integrating the gate charge curve between Vge_off & Vge_on

Some datasheets provide the Qgate curve BUT can only be used if it is covers the same gate voltage swing as the application is intending.

The actual value? the value used in the datasheet is a good place to start as this is what alot of the datasheet parameters (switching losses etc...). What to actually use?

Rg(non_osc) > 2* √(Lg/Cg)

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