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It's interesting! I searched for find a clear article, but I couldn't find a clear article for this. Also I found this link: ARM Cortex-R and this link: Cortex-R Series but they are not exactly clear. in the wiki page wrote:

The cores are intended for robust real-time use

and in the Cortex-R's page wrote:

The ARM Cortex®-R real-time processors offer high-performance computing solutions for embedded systems where reliability, high availability, fault tolerance, maintainability and real-time responses are required.

and these:

  1. High performance: Fast processing combined with a high clock frequency
  2. Real-time: Processing meets hard real-time constraints on all occasions
  3. Safe: Dependable, reliable systems with high error resistance
  4. Cost effective: Features for optimal for performance, power and area

For number one: For example for the Cortex-M, recently the NXP made the NXP_LPC4XXX series that has 200Mhz clock rate and for the Cortex-R, you can see this: TMS570LS ARM Cortex™-R4 Microcontrollers, it's funny because it has 180Mhz clock rate.

For number two: It's clear.

For number three: It's not clear! what's the mean this sentence? means isn't the Cortex-M safe/Dependable?

For number five: Well, I think it just is a claim!

Who has the experience to work by this series(Cortex-R)? What's your opinion about it? What's the deeply and exactly difference between the Cortex-M series and the Cortex-R series?

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  • \$\begingroup\$ These bullet points, like the bullet points on top of any data sheet, should always be considered little more than marketing material. \$\endgroup\$ – Scott Seidman Oct 4 '13 at 18:48
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    \$\begingroup\$ re: point 1 : it is entirely possible that the Cortex-R takes fewer clock cycles for (some) operations, thus performance may not be simply dictated by the clock rate. You would need to study detailed data - or benchmark both systems... \$\endgroup\$ – Brian Drummond Oct 5 '13 at 12:08
  • \$\begingroup\$ @BrianDrummond i don't agree \$\endgroup\$ – Roh Oct 5 '13 at 16:53
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    \$\begingroup\$ @Roh Cortex-R can use the "classic" ARM instruction set which includes some relatively complex instructions (e.g., shift and op) and predicates individual instructions; Cortex-M provides only a Thumb2-based IS which uses an If-Then instruction to predicate instructions. In addition, even when limited to relatively simple microarchitectures performance is not proportional to clock rate. \$\endgroup\$ – Paul A. Clayton Oct 8 '13 at 1:13
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Funny, I use both at work :)

The Cortex-M3 (we use STM32s) is a general purpose MCU that is fast and big (flash storage) enough for most complex embedded applications.

However, the R4 is a different beast entirely - at least the Texas Instruments version I use: the RM42, similar to the TMS570. The RM42 is a Cortex-R4 with two cores running in "lock-step" for redundancy, which means that one core is 2 instructions ahead of the other and is used for some error checking and correction. Also, one of the cores are (physically) mirrored/flipped and turned 90 degrees to improve radiation/noise resilience :)

The RM42 runs at a higher clock speed than the STM32 (100MHz vs 72MHz) and has a slightly different instruction set and performs some of the instructions faster than the M3 (e.g. division instructions execute in one cycle on the R4, not sure they do on M3).

HW timers are VERY precise compared to Cortex-M3. Usually we need a static offset to correct for drift on the M3s - not so with the R4 :)

Where I'd call a Cortex-M3 a general purpose MCU, I'd call the Cortex-R4 a complex real-time/safety MCU. If I am not mistaken, the RM42 is SIL3-compliant...

IMO the R4 is a big step up in complexity even if you're not planning to actually use the real-time/safety features.

A really nice example of the complexity difference: The SPI peripheral has 9 control and status registers on the STM32 whereas the RM42 has 42. It's like this with all the peripherals :)

EDIT:

For what it's worth, in my use cases the Cortex-R4 @ 100MHz is usually 50-100% faster than the Cortex-M3 @ 72MHz when performing the exact same tasks. Maybe because the R4 has data and instruction caches?

Another comparison, a few 1000 lines of C and ASM code are executed on reset before reaching the call to main() with the subset of the safety features I currently use :D and not peripheral initialization or anything, just startup and self test (CPU, RAM, Flash ECC etc.).

This page has more details

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  • \$\begingroup\$ E.g. he R4 would control an ABS-braking system or an industrial machine, whereas the M3 would control something not as safety or mission critical \$\endgroup\$ – Morten Jensen Nov 7 '13 at 0:16
  • \$\begingroup\$ Great answer, but only one thing to comment. All of Texas' R4 devices do not have cache, the use tightly coupled RAM, which is basically a RAM that, besied being fast, is really close to the cores. I think they did that due to the fact that caches are not good for this type of systems (they need a very deterministic system to have the real-time feature you described .. or something like that) \$\endgroup\$ – morcillo Aug 3 '15 at 23:24
  • \$\begingroup\$ @morcillo thanks for your comment. I was led to believe all R4s had data + instruction caches by this diagram from ARM: arm.com/assets/images/Cortex-R4-chip-diagram-LG.png - do you know what to make of it? I was assuming D cache and I cache were abbreviations for Data and Instruction cache. \$\endgroup\$ – Morten Jensen Aug 4 '15 at 16:22
  • \$\begingroup\$ To tell you the truth I don't know. The only thing I know is that the cortex R4 devices MADE BY TEXAS INSTRUMENTS do not have cache for a reason similar to the one I told you. I read it a long time ago somewher. Maybe they changed that or maybe I'm mixing up 2 different monsters, but as far as I remember the R4 devices don't have cache (HALcogen doesn't generate cache initialization). I may be completely wrong ... if I am please let me know .. always good to learn something new :) \$\endgroup\$ – morcillo Aug 4 '15 at 23:18
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ARM Cortex-R family (v7-R)

  • Exceptional performance forreal-time applications.
  • Processors have been developed for deeply embedded real-time applications where the need for low power and good interrupt behavior are balanced with exceptional performance and strong compatibility with existing platforms.
  • ARM Cortex®-R real-time processors offer high-performance computing solutions for embedded systems where reliability, high availability, fault tolerance, maintainability and real-time responses are required.

ARM Cortex-M family (v7-M)

  • Cost-sensitive solutions fordeterministic microcontroller applications.
  • Have been developed primarily for the microcontroller domain where the need for fast, highly deterministic, interrupt management is coupled with the desire for extremely low gate count and lowest possible powerconsumption.
  • ARM Cortex™ -M processor family is an upwards compatible range of energy-efficient, easy to use processors designed tohelp developers meet the needs of tomorrow's embedded applications. Those demands include delivering more features ata lower cost, increasing connectivity, better code reuse and improved energy efficiency.
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  • \$\begingroup\$ Another distinction seems to be that Cortex-M only supports a Thumb2-based instruction set while Cortex-R can use the basic/classic fixed-length (32-bit) instruction set as well. That -R and -A share an Architectural Reference Manual (for v7), while M has a separate ARManual, might have some significance. \$\endgroup\$ – Paul A. Clayton Oct 8 '13 at 1:07
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Have a good article about here.

Cortex-R and cortex-M series is targeted for different requirements and for different applications. It is important to know the parameters and features that separates them as there could be applications where both of them can fit in. This paper is targeted for such a scenario and helps the Designers for selection. The final objective is to help the Designers or Developers to have understanding of Architectures of ARM.

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  • \$\begingroup\$ While it's good to have a link to that interesting article, you should at least try to summarize the article in your answer. \$\endgroup\$ – AndrejaKo Oct 4 '13 at 21:27

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