Will that create a latch?
always @ (posedge clk) begin if (enable) begin myvar1[63:0] <= some value; myvar2[63:0] <=some value2; myvar3[63:0] <= value3; end else begin myvar1[63:0] <=othervalue end end
Should everything that is on the if, be on the else clause as well? I have understood that leaving an if without an else can cause a latch, but does it also mean that every signal on the if should be on the else? If that's the case, should I write something like this:
myvar2[63:0] <= myvar2[63:0];