I am working on a design that uses the TI TMDS351 chip. (Datasheet: http://www.ti.com/lit/ds/slls840b/slls840b.pdf ) This chip requires both a +3.3V in and a +5V in. Now, every other device on the board operates at 3.3 so power to the board is provided at +5V and regulated down to 3.3v before being sent to the power plane layer. For the 5v in, can I just have a line directly to the 5v pin on the bottomost "slow signal" layer? Will that cause emi problems?
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The +5V supply voltage is not a high current demand and so it shouldn't be an EMI problem but if in doubt, a series resistor can be used of say 10 ohms followed by a suitable de-coupler at the pin such as 100nF. A 1uH inductor could even be put in series with the 10 ohm to further reduce any potential EMI problems.
Note that the +5V supply pin (\$V_{dd}\$) does have a maximum rating of 6V so consider using a 5.6V zener diode in parallel with the incoming 5V to prevent potential damage to the chip from inadvertently applying slightly higher voltages.
answered Oct 10, 2013 at 10:29