I have a ST32F103RET6 MCU. I got the datasheet (and refrence manual). When I read the datasheet (and refrence manual), I found this section:


Now I have several questions about it:

  1. Why does the datasheet (and refrence manual) mention this interface?
  2. Is it a peripheral? Obviously not, because you can't find it in peripheral's section). If not, then why did the datasheet (and refrence manual) mention this interface?
  3. Why did it mention this interface at memories section?

That item is referring to the chip's interface to external memories and external memory-mapped peripherals (such as LCD controllers).

The 6800/8080 reference is describing two different "styles" of control signals for memory/IO busses: The 6800 used a R/W line and a common enable line, while the 8080 used separate "read enable" and "write enable" lines. Some low-end LCD controllers use one style and some use the other, so it has become common for microcontrollers to support both styles.

  • \$\begingroup\$ Why should interfacing an LCD "care" about the style of memory bus used by the host? Hooking up a 6800-style LCD to a Z80 poses no problem--just wire one of the address lines to R/W. Likewise to hook up an 8080-style to a 6502, just use one address line for /RD and one for /WR (assuming the device is willing to use /CS-gated cycles, which I think most will). \$\endgroup\$ – supercat Oct 10 '13 at 15:20
  • \$\begingroup\$ Perhaps the writers of the data sheet were thinking that LCDs are the type of peripheral which is most commonly available with both styles of interface, and that the feature was worth mentioning because while LCDs generally use few addresses there are other devices which use a larger address space where the difference would be significant? \$\endgroup\$ – supercat Oct 10 '13 at 15:22
  • \$\begingroup\$ @supercat: Yes, it's easy to convert between the two styles of bus with a few gates, but in cost-sensitive high-volume applications in which these microcontrollers and the low-end LCD modules are used, having a totally "glueless" interface makes a big difference in the recurring cost. \$\endgroup\$ – Dave Tweed Oct 10 '13 at 15:41
  • \$\begingroup\$ In most cases I've encountered, if one can spare an address pin or two, no extra gates are required. If address space is tight and a device would consume a big chunk, one might want to avoid wasting a couple address bits, but in cases where one isn't bothering to decode much of the address space anyway, using the address bits is often simple, easy, and "free", especially if one won't want to use "read-modify-write" instructions on the device. \$\endgroup\$ – supercat Oct 10 '13 at 16:28

From the datasheet:

The FSMC can be configured to interface seamlessly with most graphic LCD controllers. It supports the Intel 8080 and Motorola 6800 modes, and is flexible enough to adapt to specific LCD interfaces. This LCD parallel interface capability makes it easy to build cost- effective graphic applications using LCD modules with embedded controllers or high- performance solutions using external controllers with dedicated acceleration.

Its mention under memories is an error. (ST documentation sometimes has inaccuracies.) The 8080/6800 reference refers to the control signals. The 8080 for instance has an ALE (Address Latch Enable) to allow address/data muxing. The 6800 bus is not multiplexed, it only needs an enable and read/write signal.

  • \$\begingroup\$ Incorrect. The 8080 does not have a multiplexed bus or an ALE signal. (You may be thinking of the 8085, which does.) \$\endgroup\$ – Dave Tweed Oct 10 '13 at 14:35

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