I am working on an assignment for my Architecture and Assembly course and I am tasked with making a circuit using JK Flip Flops to analyze a bistream for when 10110 occurs with overlap.

I am progressing just fine until I hit a roadblock when making the karnaugh map. The circuit is calling for 6 different states (3 JK Flip-Flops) so I am progressing in binary from 000 to 101 but my karnaugh maps are 4x4. (I have to take into account the input too)

The thing is, on the Karnaugh maps, I have an entire column that is empty. I would assume that I would place a "d" (Don't care) in each cell but I am not entirely sure of what actually goes there.


You need to give a better idea of how you've laid out your map, but I'm guessing that your "empty column" represents the two states (out of the eight total) that you're not using.

While you could use them as "don't care" states to potentially simplify the final logic, it is generally better practice to add those states to your state diagram, and make sure that they lead back into a legal state, in case the logic somehow gets into one of those states (cosmic rays, power-up, etc.)


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