This is a quote from ATmega32 datasheet:
By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz to get maximum resolution. If a lower resolution than 10 bits is needed, the input clock frequency to the ADC can be higher than 200kHz to get a higher sample rate.
I'm planning to use 8 bits of ADC. The question is: how much higher than 200kHz can I go? I couldn't find any information about this in the datasheet. Is it possible to use a prescaler of 64 or 32 and therefore run ADC at 250kHz or 500kHz respectively without conversion errors when the uC is running at 16MHz? And what are the possible consequences of running ADC out of spec?