I know this is a super elementary question but I am a one day newborn baby in FPGA field!

For years I have worked with AVR and now I am just starting FPGA learning. I want to know if they have an internal oscillator like AVRs for clock source or it should be prepared externally with something like crystal oscillators?

  • 3
    \$\begingroup\$ Depends on which FPGA you choose (of course). There are variants with internal oscillators, e.g. the smaller Lattice parts. \$\endgroup\$
    – user36129
    Commented Oct 27, 2013 at 17:12
  • \$\begingroup\$ Chances are if this is supported it is either something simple and imprecise used only for bootstrapping configuration from an external flash chip in master mode, or else some bonus mode of making one of the on-chip clock mlutipliers run at a medium slow speed without a reference input. I'd expect either to be far less accurate than the internal clocks on many modern MCUs as it would not be intended for more than temporary use, while MCU internal clocks are sometime carefully engineered to be stable enough even for communication protocols, may be trimmed per unit, etc. \$\endgroup\$ Commented Sep 2, 2016 at 17:18

1 Answer 1


Most FPGAs have a PLL clock synthesis block that generates the clock/s you need from some kind of source. That source may be an external crystal plus amp circuitry in the chip, or an external resonator, or an on-chip resonator, or something else, or a combination/choice of multiple options.

The only way to know the real answer for a particular chip, is to read the data sheet of that particular chip. When you work with any piece of electrical component, you should get ahold of, and read, the data sheet for that component. This, btw, is also true for the Atmega328p on the Arduino boards -- if you haven't yet read the Atmega datasheet, then you're probably not yet ready to move on from AVR MCUs to FPGAs ;-)

  • \$\begingroup\$ Thanks! But I have read Spartan II data sheet word by word ( link below ) . The only places that it talks about clocks are page 13&30 and just about its DLL. In page 30, it says that a crystal oscillator may be used but nowhere talks about internal PLL. On the other hand it says the DLL input works fine up to 1nS(= 1GHz)but in first page says that this device just works up to 200MHz!! I don't know what crystal oscillator should I use(for example a 100 MHz or 150MHz and using DLL clock multiplier).I am really really confused:( xilinx.com/support/documentation/data_sheets/ds001.pdf \$\endgroup\$
    – Aug
    Commented Oct 28, 2013 at 7:49
  • \$\begingroup\$ Spartan II is old old tech in FPGA land. So no PLLs (or DCMs which came between the two and still have their uses). For Spartan II I'd hang a 50MHz oscillator off a GCLK pin. You could use a DLL to multiply it but, as a beginner, you are not going to get anywhere near 200MHz with your circuits. \$\endgroup\$ Commented Nov 4, 2013 at 13:33
  • \$\begingroup\$ @Aug the purpose of a DLL is to fulfill the general role that originated with the PLL concept. One could argue if a DLL is literally a type of PLL or not, but functionally it has the same job. \$\endgroup\$ Commented Sep 2, 2016 at 17:17

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