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The circuitry I have on my board currently is the schematic above. It is showing a start up regulator. D1 is an 18V zener, as is D3. When the AC line comes up, D1 clamps at ~18V. Q1 turns on, allowing the 18V rail to charge up. Once the 18V rail hits about 15.5V, the primary side gate driver starts switching, the 18V rail starts being powered by a coil on the transformer (represented by L1), and D2 becomes reverse biased, turning that circuit off during normal operation. With D1 clamping at 18V, and counting the drops of Q1 and D2, Q1 will not have current flowing through it unless the 18V rail is below about 16.8V.

My issue is that at corner points of our operational parameters, that can happen. What I'm looking to do is pull Q1's base low once the 18V rail hits about 16V (or by somehow detecting when switching starts), and then hold it low as long as the 18V rail is above about 13V. The gate driver can continue to operate down to 10V, so I'm not concerned about that.

What I've seen happen is that the supply will start up, the 18V rail comes up as I want and reverse biases D2. Then, if I decrease the output voltage to the bottom end, the 18V rail drops to 16.5ish, allowing Q1 to conduct current, and in some cases overheating Q1 and R1, and causing damage.

There are a couple ways I know of to fix this - I can redesign the transformer to bump up the voltage of the 18V winding, or I could add a comparator circuit to detect the the level of the 18V rail, pull the comparator and Q1's base low at some point, and add hysteresis to only release it at another, lower point. Problem is, this is an inherited design, and we're very close to going to market with it. I'm trying to find the least intrusive way I can to fix the issue. I really don't want to go the route of redesigning a magnetic, and the comparator doesn't strike me as the most elegant solution.

So, I would appreciate any insight anyone has.


What about this: -

enter image description here

When the switcher starts, this is detected at R4 and feeds the gate of a MOSFET which then clamps the base of Q1. I've added a 1nF capacitor to ensure that ripple is reduced on the signal feeding the MOSFET's gate.

You may also consider not clamping the base completely and fit a resistor in series with the MOSFET's drain - maybe 470k.

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