0
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I need to plan a circuit that will square a 3 bit binary number: $$\{Y_2, Y_1, Y_0\} \rightarrow \{S_5,S_4,S_3,S_2,S_1,S_0\} $$

I thought of the common way we multiply numbers and used it to plan the circuit (as you can see in the top left of the attached picture)

circut

What do you think? Is there a better way to do the following using the basic gates, FA, HA and MUX?

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Of course there is.

First we write out the truth table:

 Y    S
000 000000
001 000001
010 000100
011 001001
100 010000
101 011001
110 100100
111 110001

We notice right away that S0 = Y0, S1 = 0, and S5 = Y1 * Y2. Let's remove those.

 Y   S
210 432
000 000
001 000
010 001
011 010
100 100
101 110
110 001
111 100

And now we see that S2 = Y1 * !Y0, S3 = Y0 * (Y1 ^ Y2), and S4 = Y2 * (!Y1 + Y0) = Y2 * !S2. Since you now have all 6 equations for the bits in S, building a logic circuit for it is easy, and left as an exercise for the reader.

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  • \$\begingroup\$ So the work pattern is to write the truth table, find constant values and values that are gained by basic logic gates and then figure out the functions from the values left? \$\endgroup\$ – Quaker Nov 8 '13 at 12:32
  • \$\begingroup\$ @Quaker: Sure. And more rigorous methods such as K-maps, Q-M minimization, and espresso will work until you can see the patterns at a glance. \$\endgroup\$ – Ignacio Vazquez-Abrams Nov 8 '13 at 12:35
  • \$\begingroup\$ K-Map can't work here since we have 6 S values right? \$\endgroup\$ – Quaker Nov 8 '13 at 12:43
  • \$\begingroup\$ What is the right way to get from the truth table to the functions as you did on the second step? Just try to figure it out? Isn't there a quicker way (especially for beginners)? \$\endgroup\$ – Quaker Nov 8 '13 at 12:51
  • \$\begingroup\$ @Quaker: There is no quick way for beginners to do it. They must either slog through it or use one of the other methods named. \$\endgroup\$ – Ignacio Vazquez-Abrams Nov 9 '13 at 6:51
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This problem only has 8 possible inputs, so a lookup table could be a good answer, especially if this will be inside a FPGA.

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