Considering the following scenario:

A designer wants to connect 3 devices on a PCIe x4 finger edge connector, commonly found on mother boards. All 3 devices will be populated on the same PCIe card. One device has 1 port of 2 lanes i.e (1 x2 PCIe port) Remaining two devices have 1 port of 1 lane (1 x1 PCIe port) each.

Scheme 1:

With PCIe switch

Scheme 2:

Without PCIe switch

I've seen scheme 1 in the datasheets of some PCIe switches. I want to know if a PCIe switch is really required in this case.

What if we omit the switch and just split the PCIe lanes as in scheme 2?

Will it be a legit PCIe network?

If yes then how will bus numbers be assigned?

Kindly ask if there is a need for clarification.

Edit 1:

Quote from PCI_Express_Base_Specification_Revision_3.0 :

The ability to split a Port into two or more Links is optional. An example of this behavior would be a x16 Port that may be able to configure two x8 Links, four x4 Links, or 16 x1 Links.

More Information can be found under heading Required and Optional Port Behavior

  • \$\begingroup\$ About "just split the PCIe lanes?", how do you propose to do that? \$\endgroup\$ – Anindo Ghosh Nov 8 '13 at 7:41
  • \$\begingroup\$ @AnindoGhosh, Splitting lanes as in Scheme 2 or described in spedification. See Edit 1 \$\endgroup\$ – microMolvi Nov 8 '13 at 9:55

So, the way PCIe links work is they come up as gen 1 x1 links, then negotiate up to more lanes and higher speeds. If you wire the card with multiple devices connected to the edge connector, only the one connected to lane 0 will work, the rest will not enumerate. Unless, of course, you can reconfigure whatever switch port drives the slot in question to bifurcate the slot into the lane configuration you need. This is certainly not something that you can rely on - it not only requires the switch or bridge to support that configuration, but it also requires that the ability to change the configuration is exposed somewhere. All this will be highly dependent on the exact motherboard in use, the PCIe related chips installed, how they are wired, and how the BIOS is written. Not to mention this also prevents the card from working properly in systems that only connect 1 or 2 lanes instead of all 4, which happens occasionally, though most commonly with x16 slots wired as x8 or x4.


This is conceptually very easy to understand, but maybe not very clear from the specification. I have been wrestling with this issue a while back and this is how it works:

You cannot split a single port into multiple ports. Or to say it differently: No matter how many lanes a port has, you can only use all those lanes to feed one device. Like all other related serial protocols (SATA, USB 3.0 and up, thunderbolt), you need to use a switch to use multiple devices on one port. Such switches are also not particularly trivial devices, they need to do a minimal amount of arbitration aside from physical switching, so you cannot get by with just muxes. Fortunately, if you sign a boatload of NDAs, you can get these parts fairly cheaply from companies like Pericom, JMicron and ParadeTech.

  • \$\begingroup\$ Does that mean that the optional ability to "split a port into two or more links" is not implemented in practical devices? \$\endgroup\$ – microMolvi Nov 8 '13 at 11:17
  • \$\begingroup\$ This may be implemented, but it is a host-side parameter. You will have to tap into e.g. the LPC bus or fiddle with chipset drivers to get that kind of functionality. You cannot split a single port into multiple links from the device side. \$\endgroup\$ – user36129 Nov 8 '13 at 11:29

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