Bit-banging is when a UART or USART hardware component or module is not available or not used.
It basically means that software needs to service each bit possibly through loop, counter compare or interrupt.
Using a shift register macro-cell or external component is not true bit-banging unless software is providing at least the clock or start/end conditions, if a hardware timer is driving a shift register you have created a crude ART (asynchronous receiver, transmitter) add some more VHDL code and it is a UART (but if you consider the VHDL to be code then it is bit-banging).
On deeper reflection I need to make further clarification. Bit-banging is different from what may be the other type by virtue of the fact that it is done a bit at a time rather than a byte (or word) at a time. This means that the software has to perform multiple communications operations corresponding to work done for each bit with possible additional overheads for start and stop bits or state changes depending on the format/protocol. It make the shift register the antithesis of bit-banging because it is the circuit component that will be able to clock out multiple bits unattended. An uncertain situation would be using a shift register to move the data but generating the clock edges in software. This would probably fall into Bit-banging still due to the fact that the software has to service the (clock of the) data movement on a bit-by-bit basis (even with the data shift register).
If you set up a ART, UART, USART, SPI, I2C etc peripheral and then send a byte (or word) and the data moves out (or in) without further software assistance that would NOT be Bit-banging.