Does anyone have code to emulate a 16-bit input shift register with an ATtiny2313?

Question

I would like to use an ATtiny2313 to emulate a Super Nintendo controller because I have an ATtiny2313 but I do not have an input shift register and I don't feel like soldering wires onto an existing SNES controller board.

This application requires 12 inputs (bits 13-16 are always 1) and a latch, clock, and data out pin.

Do you have this code lying around? It can't be more than 20 instructions.

Answer 1

There's already an 8-bit shift register built into the Universal Serial Interface (USI). All you have to do is use it twice in a row.

Answer 2

I don't have this code lying around, but I do have the next best things:

• AVR Instruction Set
• ATtiny2313 information
• guide to starting in AVR assembler
• Macros in assembler

^{You might say I do have the code laying around, but it's not organized and concatenated correctly... ;)}

Answer 3

As @tyblu says, it's all right there in the manual for the USI. In particular what you want is to use it in "Three-Wire Master Mode Operation." Take a look at Figure 61 on page 143 of the datasheet. The datasheet is even kind enough to provide an optimized (8 instruction) assembler routine (SPITransfer) for this exact purpose:

SPITransfer:
  out USIDR,r16
  ldi r16,(1<<USIOIF)
  out USISR,r16
  ldi r16,(1<<USIWM0)|(1<<USICS1)|(1<<USICLK)|(1<<USITC)
SPITransfer_loop:
  out USICR,r16
  sbis USISR,USIOIF
  rjmp SPITransfer_loop
  in r16,USIDR
  ret

If you wire it up so that the you have a 2313 pin connected to the controller's "latch" wire (orange), the USCK pin connects to the controller's "pulse" wire (red), and the DI pin connects to the controller's "data" wire (yellow) - you should be good to go. Per the datasheet, the code example assumes that the DO and USCK pins are enabled as outputs in the DDRB Register.

Once the hardware is set up, all you need to do is generate a 12us high pulse on the "latch" pin, drop the pin low for 6us, then call the above assembly routine twice (saving the return value away) after each call.

I found this reference very informative regarding the (S)NES interface.

Answer 4

The following code works great. The latch signal is connected to PB5. The SIG_PIN_CHANGE handler does its work on both edges of the latch signal but it doesn't matter, and the last time I tried adding the check it did not work.

#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/sleep.h>

ISR(SIG_PIN_CHANGE)
{
    USIDR = PINA | (PIND & 0b01111100) | (PINB << 7);
    USISR = (1 << USIOIF); // clear overflow bit, set counter to 0
    USICR |= (1 << USIOIE); // enable overflow interrupt
}

ISR(SIG_USI_OVERFLOW)
{
    USIDR = (PINB << 3) | 0x0f;
    USISR |= (1 << USIOIF); // clear overflow bit
    USICR &= (0xff ^ (1 << USIOIE)); // disable overflow interrupt
}

int main() {

    USIDR = 0xff;
    USICR = (1 << USIWM0) | (1 << USICS1); // 3-wire mode; external, positive edge.

    DDRA = 0;
    DDRD = 0;
    DDRB = 1 << 6; // MISO

    // Enable pullups
    PORTA = 0x3;
    PORTB = 0b11111;
    PORTD = 0xfc;

    // USIDR is shifted out MSB first.

    // pin change interrupt for latch pin
    PCMSK = (1 << 5);
    GIMSK |= (1 << PCIE);

    sei();

    while (1) {
        sleep_mode();
    }
}