I am working on a VHDL project where I am trying to make an LCD controller.

I have been trying to get the period of my scaled clocks using Signal Tap, however the time bar does not show the time accurately. The time bar just shows the sample units. When I set it to time units, it just adds a seconds to the sample numbers. I would like to figure out the period of my scaled clocks as a verification that it is the correct frequency as it is used for timings on the read and writes to the LCD.

I can't seem to figure out how I can get the frequency of a probed node in signal tap.

Does anyone know how I can do this?


No, you can't do that.

SignalTap is a synchronous logic analyzer only, which means that it uses clock(s) inside the FPGA to do the data sampling. There's no independent timebase that you can use as a reference to measure time intervals or frequencies directly.

However, you have a couple of options.

  1. You could feed your FPGA clock (or a divided-down version of it) to an output pin, and then measure the frequency with a counter or oscilloscope.

  2. You could feed a signal with a known frequency into the FPGA and then capture that signal with SignalTap. When you figure out the period in terms of SignalTap samples, you can derive the SignalTap sample rate by multiplying the period by the known frequency of the input signal.

  • \$\begingroup\$ Thanks Dave. I was using Oscilloscope to do it before which worked fine since all the frequencies I was interested in was well within the bandwidth of my oscilloscope. Thanks a lot for the answer though. I will probably setup a test bench setup for measuring the clock using your method. \$\endgroup\$
    – Edwin
    Nov 11 '13 at 2:09

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