Minimizing Ringing in a H-Bridge

Question

I am designing a H-Bridge based DC-DC Converter that boosts 24V to 350V DC. I use a HF transformer at the output of the H-Bridge for the actual boost. The circuit works OK for a while and then the IC dies. I suspect this is because I have ringing present at the output of the H-Bridge. The first picture below shows the output without the transformer and the second one shows how the ringing increases with the transformer.

My layout currently is on a single layer board and I will move to a 2-layer board to minimize loop areas of signals that drive the gates of the MOSFETS - but wouldn't the inductance of the transformer always cause some ringing? If so, how can I be sure that it won't damage my chip? The half-bridge driver that I'm using is MAX15019 and it can tolerate -5V to 130V at the output pin so I'm mostly concerned about the negative transients.

The following schematic shows the circuit. The graphs are measured at nodes A and B with respect to GND (this is also where the transformer's primary is connected). Note that I have tried various values for the gate resistors and using a higher one usually just leads to more power loss in the transistors. As mentioned before, I am concerned with minimizing negative transients - particularly when the transformer is connected.

Answer 1

There are two things you can do (and are probably already doing, although maybe not quite the way your circuit requires):

1. Shunt the spikes to a supply with fast diodes. Even if you did not design this, you are already doing it, at least via the parasitic diodes of the MOSFETs in the half bridge. By using dedicated diodes, e.g. Schottky diodes, you can lower the power dissipation inside the bridge.

2. Limit the slew-rate of your bridge. You could (and probably already do) use a snubber circuit as passive solution, and/or use a small capacitor to provide negative feedback from the half bridge's output to its driver (make sure you provide negative feedback!).

As with all HF electronics, the sizing can be tricky because you'll either have to accurately model the parasitics of your circuit or adjust your circuit until it happens to work well enough. Unfortunately, either too much or too little could destroy your circuit. For example:

1. If the parasitics of your circuit, possibly after adding a snubber, resonate, you may have even more ringing, killing your MOSFETs faster.

2. Too little slew-rate-limiting leads to stronger ringing and can kill your MOSFETs. Too much slew-rate-limiting increases the power dissipation while switching and can kill your MOSFETs.

EDIT:

I didn't see the schematics before. With these, we see that (just as the IC manufacturer in its typical operating circuit) you did not bother with details such as snubbers. Hence, whilst switching, much of the current flowing through your inductor can only go into parasitic elements in your circuit. The total switching time in your circuit is probably on the order of 50 ns (gate resistance of your circuit is 5 ohm discrete plus 1 to 3 ohm driver IC output resistance, and the gate "input" capacitance is given as typically 7.7 nF in the MOSFET datasheet). During some of this time, we need an alternative path for the current, a snubber circuit. A diode to a rail is a start; a capacitor parallel to it or across the inductor may help, too, but needs care because you do not wish to create a problematic resonance.

Answer 2

One nice thing about using FETs in an H bridge is that the body diode makes an adequate clamping snubber to the supply rail. Current flowing in the transformer leakage inductance will make its way back to the supply through the diode when the switch is turned off. An additional snubber shouldn't be required, although might be desired for EMI when operating at duty cycles less than 50% of the complete switching cycle.

Having said that, there are a couple of things that need to be true (and don't seem to be) for proper operation:

• The H bridge source voltage (Vbatt here) needs to have low impedance at the switching frequency and out to the parasitic resonant frequency (of the transformer leakage inductance and FET output capacitance). There needs to be a high quality capacitor (that can handle all the ripple current) located at the H bridge.
• Bias voltage for the MAX15019 has to be separate from the H bridge source voltage. Having these two voltage with the same source is bad practice. An LDO would be a good way to separate the IC bias from the H bridge source.

Here is the scenario. Let's say that at the parasitic resonant frequency, the supply impedance is 3 Ohms and that the current in the transformer leakage inductance is 1 Amp (these numbers are just for illustration, too lazy to do any real work here). The current will be clamp snubbed back to the source voltage, adding 3 Volts to it (1 Amp through 3 Ohms). If Vbatt starts at 13V, then the clamp spike will add 3V to it for a total of 16V. Vbatt also supplies the MAX15019 and 16V is probably enough to kill it.

Answer 3

Check the mosfet Coss capacitance and since your ringing is within nanoseconds (measure that) and the spike would be two times the DC voltage. Calculate the winding capacitance using the formuala f = 1/2*Pi* sqrt(L*c) since you know the Coss capacitance calculate L. Connect a RC snubber across the transformer. The spike would go away.Now the problem you would be facing would be gate pulses to the MOSFET for that you need a good gate driver