3
\$\begingroup\$

NOTICE: I have added another question here that a solution for each one may help for solving the other one.

Please look at Fig-1 below. It is a common usage of termination resistors. R1 , R2 work for impedance matching and R2 also reduces the return signals ( specially we have them when Q>> 1/√2).

Firstly, input resistors (R1) are based on line driving. What about the PCB ? in PCB we have not coaxial lines . Should we need them ?

Second question is my specific problem: my filter receives the signal from a source with 75Ω impedance and sends it to a FPGA with a very large input impedance (Fig-1 ,2 ). When I connect R1 as Fig-1, filtering performance is fair ( Q=0.6) with slow slope but if I connect it as Fig-2, it shows satisfactory performance ( No Return Signals ) and if I remove it, many return signals will appear.

I am confused about the theory: If the device impedance is very high ( say in MΩ region), why putting a relatively small resistor (20KΩ /1MΩ )in series with that should stop return signals ?

And Finally, how I can relate these resistors to other steps impedances (for best Quality factor across the whole Cauer design)?

Additional Information: The main purpose is designing a very high quality LPF for a DDS (that I have designed with FPGA ) for removing aliases that follow Nyquist diagram. The device at the output are the Differential pins of FPGA Xilinx XC3S400. Any help that lead to best design is highly appreciated.

Pictures: I just put these designs as example , I am using a 3 pole Cauer LC filter but the same result with the circuits in these pictures

Fig-1 Original Design:

enter image description here

Fig-2 My test circuit:

enter image description here

\$\endgroup\$
5
  • \$\begingroup\$ 2nd question - what do you mean by return signals - where are they seen, how did you measure them. Also what is the real impedance of your FPGA input at hundreds of MHz? It could have a few pico farads and could easily resonate badly/highly with L2 and R2 will quench this if in series and at 20kohm. \$\endgroup\$
    – Andy aka
    Nov 18, 2013 at 20:06
  • \$\begingroup\$ When you say "return signals", do you mean reflected signals? \$\endgroup\$
    – The Photon
    Nov 21, 2013 at 17:09
  • \$\begingroup\$ I think you need to speak more clearly about what I said above. \$\endgroup\$
    – Andy aka
    Nov 25, 2013 at 16:08
  • \$\begingroup\$ @Andyaka Sorry for the delay. I meant by return signal, the reflection made by high input impedance. The FPGA input impedance is around 10 MΩ ( measured myself !, it was not available in the datasheet ). \$\endgroup\$
    – Aug
    Nov 25, 2013 at 16:32
  • \$\begingroup\$ At the frequencies you are using with the short tracks lengths you are using, there'll be no reflections to bother about. Think about high speed logic gates on PCBs. They don't use terminations between gates. The resistors are there, as far as I'm concerned to control the Q of the resonant circuit formed by the inductor and the capacitor. The side effect of this will be to make the input and output impedance more genrally usable across a wider band of frequencies but, this is down to tempering the Q of the filter circuit and would apply at 1Hz as it does at 100MHz. \$\endgroup\$
    – Andy aka
    Nov 25, 2013 at 17:49

5 Answers 5

4
+300
\$\begingroup\$

I am confused about the theory: If the device impedance is very high ( say in MΩ region), why putting a relatively small resistor (20KΩ /1MΩ )in series with that should stop return signals ?

Signals approaching a high-impedance connection are akin to waves crashing into a hard surface. They will bounce, and return in inverted form (ringing). In electronics the returned wave can be in negative voltage and large enough undershoot to blow the clamping diodes or even the drivers.

A properly calculated source serial terminating resistor placed close the pin prevents many sorts of problems with 'ringing' and EMI. If your source is 75Ω already, and your termination is Megs'n'Puffs, try this:

  • make sure your pcb trace is also 75Ω. You'll likely need change the width and length, and keep in mind it changes with substrate thickness and the layer you are on.
  • Place a 66Ω resistor at R2 closest to the pin as possible.
  • leave everything else out.

This way, all three pieces are the same impedance, nothing should reflect. Anytimes the line resistance changes, you'll get some reflection. If you do it right, you can from the scope below where there is 1V undershoot:

enter image description here

To this, by adding just one properly sized resistor:

enter image description here

To get the best result, you'll need to load in a simulator like lineSim (Hyperlynx by mentor) and verify.

My feeling would be that in the above examples you've given, you can do without R1 altogether and make R2 66Ω, place your filter closest to one end, and match your trace impedance 75Ω.

\$\endgroup\$
3
  • \$\begingroup\$ Thank you for excellent discussion but as this question is fully about the theories ,just please let me know if I understood well: R2 should be in series ( as Fig-2) and a 66Ω connected between the FPGA pin and the ground ? May I know how you calculated that 66Ω ? On the other hand, reaching 75Ω line resistance is not easy. It needs a wire of just tens of micrometer wide and I am not sure if I can make it! ( I am in prototyping period) can I use a resistor instead? \$\endgroup\$
    – Aug
    Nov 21, 2013 at 18:49
  • \$\begingroup\$ @Aug we're just setting up a transmission line impedance matching of 75Ω for every piece. Input is 75Ω already, the trace or wire you'll need to make (use longer lengths of thin wire), and finally you make R2 66Ω per figure 2 and place it close to the pin (no other resistor to the ground). The number 66Ω is because I happen to have seen and simulated the 75Ω transmission line problem before. The Sim picture above is from that. And NO, you can't use a resistor for the wire, the impedance change is what causes reflections. \$\endgroup\$
    – MandoMando
    Nov 21, 2013 at 22:36
  • \$\begingroup\$ please look at this question: electronics.stackexchange.com/questions/91616/… \$\endgroup\$
    – Aug
    Nov 23, 2013 at 13:06
3
\$\begingroup\$

The bits that confuse you are all because of what will probably be a surprising thing to learn about how electrical signals travel. The technical term is transmission line theory, and the link takes you to wikipedia. But stay with me for a moment, because it is not difficult. Indeed I think it is even easier than the prior answers may make it seem.

All of our electronics, even simple cables, have parasitic components. Any wire (when seen together with ground or whatever your return path is) will also have inductance and capacitance. Well, and resistance, but that is often negligible whilst surprisingly the rest often isn't. A signal will see the combination of these parasitics as some characteristic impedance: It is just as if there is a resistance. But it is not an ohmic one, and to emphasize that the more general term impedance is used.

If you want to get more involved, you can characterize an impedance precisely by combining it with the phase difference between current and voltage. But that's not really needed to understand the idea; all we need is that it is going to be either +90° or -90° if everything (well, your transmission line, to sound academic) does not dissipate energy, that is, if there is negligible actual ohmic resistance.

To avoid this system to resonate, which would appear as a signal first travelling forward and then backwards (as a "reflection"), we need to dampen it. Perfect damping requires that you dissipate all of the energy received at the end. This occurs if you provide an ohmic resistance at the end of the transmission line, and only if this resistance matches its impedance.

Does this happen in your example circuits? I will assume the filter (R1, L1, L2, C1) is designed so as to not change (transform) the line's impedance, or else to adjust it to 60 Ohm, the following is the case. But note that this is a gross oversimplification, as you can instantly see from the fact that there is an ohmic resistance (R1) in there.

In the upper diagram, the ohmic resistance is 60 Ohm parallel to the input resistance of your IC, or just a tiny bit below 60 Ohm. That's practically a perfect impedance matching, and should eliminate or at least greatly reduce any reflected "return" signal you might observe.

But now let's have a look at your lower circuit. The terminating resistance is 20 kOhm in series with the input resistance of your IC. That's probably more than a Megaohm in total. I suppose after this explanation you are no longer terribly surprised that there will be some resonance happening? The only place for the energy to travel is back, such that you observe them as what you called "return signals."

So the general answer for a filter like yours that seems to simultaneously be supposed to be a termination is to critically dampen it.

\$\endgroup\$
1
  • \$\begingroup\$ Actually your answer contradicts with the observations of the OP, has he wrote that in the lower figure there is no reflection. \$\endgroup\$ Jun 23, 2018 at 17:29
1
\$\begingroup\$

I can only answer half your question: -

What about the PCB ? in PCB we have not coaxial lines. Should we need them ?

In both cases, when a circuit is feeding a signal to another circuit on the same PCB within a few centimetres at frequencies up to the low 100s of megahertz, R1 is to control the Q of L1 resonating with C1. This might be done to shape the filter to have a distinctive hump in the passband (maybe to counter some other spectral deficiency elsewhere) or it might be done to control the passband to maximize its flatness.

On the same PCB, it is unlikely that it would be to match line impedances between chips in the low 100s of megahertz or less.

The bit I can't answer I'll make as a comment to your question.

\$\endgroup\$
9
  • \$\begingroup\$ Hi dude. Thank you for your kind support .As you may remember I started with AD9850 but soon realized that it is impractical to get sawtooth and triangular wave forms in 0-50MHz out of a sine wave. That's why I started learning FPGA during the last 2 weeks. Now I have made a signal generator that can make almost ANY waveform except square waves. According to the link below I could use differential I/O ports of FPGA as a high speed comparator but it has some noise in the threshold voltage. That's why I need a high quality LC LPF with FC=50MHz, Q=1/√2. I would appreciate your help if possible. \$\endgroup\$
    – Aug
    Nov 18, 2013 at 22:23
  • \$\begingroup\$ electronics.stackexchange.com/questions/90149/… \$\endgroup\$
    – Aug
    Nov 18, 2013 at 22:23
  • \$\begingroup\$ Have you tried a little bit of hysteresis/positive feedback to get past the noise issue. I don't think a filter will help too much. \$\endgroup\$
    – Andy aka
    Nov 18, 2013 at 23:20
  • \$\begingroup\$ oops! I don't know about that! can you give me a bit of information about that? \$\endgroup\$
    – Aug
    Nov 19, 2013 at 2:10
  • 1
    \$\begingroup\$ I'm thinking you need a real fast comparator circuit, sort of 1ns rise times. These must be available although they may be quite rare. The other option is to amplify the sine/triangle to clipping levels then feed it into the FPGA. Trouble is, as soon as you hit clipping you get transistor saturation and this slows things down. \$\endgroup\$
    – Andy aka
    Nov 21, 2013 at 19:05
1
\$\begingroup\$

I am confused about the theory: If the device impedance is very high ( say in MΩ region), why putting a relatively small resistor (20KΩ /1MΩ )in series with that should stop return signals

Analyze the circuit as your reflection would see it in superposition. Open your input and solve for the voltage there. Make your FPGA the source of the reflected wave. You'll see there is a strong low pass with R2 and C1. This will attenuate a lot of the reflected energy, but there will be a smaller reflection at R2 due to the match there.

\$\endgroup\$
1
1
\$\begingroup\$

I think you will find, once the other problems with the design are cleared up, that the best termination scheme is as designed :

feed the filter from R1 = 50 ohms including the output impedance of whatever drives it;

terminate in R2 = 50 ohms between the filter output and GND, right next to the destination (FPGA pin)

As for the filter topology question : both Cauer and Chebyshev have ripple in-band, and it is as high (or low) as you designed it for (if you built the filter accurately to the design). It is easier to reduce ripple in the Chebyshev but at the price that the out-of-band rejection is poorer. (Cauer is probably the best choice)

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.