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How many bits would you need to address a 4M X 8 memory if

  1. the memory is byte-addressable?
  2. the memory is word-addressable with a word size of 16 bits?
  3. the memory is word-addressable with a word size of 32 bits?

For #1, I have understood the solution as 4M = 22 x 220 = 222 = 22 bits.

For #2 and #3, the answers provided in our lecture was:

  • 4M X 8 bit memory requires 21 bit addresses if it is word-addressable and word size is 16 bits.
  • 4M X 8 bit memory requires 20 bit addresses if it is word-addressable and word size is 32 bits.

Question:
How did it arrive to 21 and 20 bit addresses for 16-bit and 32-bit word sizes respectively?


EDIT:

Homework:
How many bits would you need to address a 2M X 32 memory if

  1. the memory is byte-addressable?
  2. the memory is word-addressable with a word size of 32 bits?

Solutions:

  1. 2M = 2 x 220 = 21 x 220 = 221 = 21 bits
  2. 21 - [log 2 (32/32)] = 21 - [log 2 (1)] = 21 - 0 = 21 bits

Are my solutions correct?

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  • \$\begingroup\$ A lot of this might also depend on the addressing scheme you want to use. If you want full linear addressing, then the calculations are easy, however some architectures uses a segment (page) + offset type addressing scheme specifically to minimise the address size. \$\endgroup\$
    – Brad
    Nov 23, 2013 at 11:22
  • \$\begingroup\$ For the above given lecture example, what may be the mathematical solutions for #2 and #3? Do I simply subtract 1 or 2 from the byte-addressable bits (22 bits)? \$\endgroup\$
    – k_rollo
    Nov 23, 2013 at 11:29
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    \$\begingroup\$ No, you subtract log2(word_width/8) from the byte-addressible bits. \$\endgroup\$
    – user_1818839
    Nov 23, 2013 at 11:32
  • \$\begingroup\$ Just to confirm, is it /8 because it is 4M X 8? \$\endgroup\$
    – k_rollo
    Nov 23, 2013 at 11:48
  • \$\begingroup\$ Yes. (Unwritten in the question is how you reorganise a X8 memory to get 16 or 32 bits out of it, but that's another story.) \$\endgroup\$
    – user_1818839
    Nov 23, 2013 at 12:13

2 Answers 2

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Yes, your solutions for the homework are correct. Note that for the 4Mx32 you only use 8 bits per 32 bit word. If you want to use all bits you'd need a 32-to-8 multiplexer/demultiplexer.

#2 and #3 of the lecture are a bit confusing. If the memory is word-addressable with 16-bit words, it's no longer a 4Mx8 memory but a 2Mx16 memory. To address 2M words you need 21 bits. Similar for #3.

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  • \$\begingroup\$ I have been thinking something might have been wrong with the lecture example. \$\endgroup\$
    – k_rollo
    Dec 2, 2013 at 0:00
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Solutions to Homework:

  1. 2M x 32
    = 21 x 220 x (25 / 23)
    = 21 x 220 x 22
    = 223
    Answer: 23 bits for byte-addressable
  2. 2M = 21 x 220 = 221
    Answer: 21 bits for word-addressable
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  • 1
    \$\begingroup\$ So, how do you select the highest order byte or address 0, and after that the lowest order byte of address 1? \$\endgroup\$
    – radagast
    Dec 1, 2013 at 15:55
  • \$\begingroup\$ Please note that this answer was provided by the OP and is the desired answer. @radagast If you would like to ask a different question please do not add it as a comment, as the issue of byte addressability within a multi-byte word is not part of the original question. \$\endgroup\$
    – Joe Hass
    Dec 1, 2013 at 16:55
  • \$\begingroup\$ @JoeHass: I hadn't noticed that the answer was from OP himself, thanks for drawing my attention to it. About the question: it's rethorical. I know the answer. \$\endgroup\$
    – radagast
    Dec 1, 2013 at 19:08
  • \$\begingroup\$ Do we get neg-voted for answering your own question? I thought the StackExchange websites allowed "Q&A" posts if possible. \$\endgroup\$
    – k_rollo
    Dec 1, 2013 at 23:56
  • \$\begingroup\$ I don't think you got downvoted for answering your own question, but because people think it's the wrong answer. Actually so do I. Did you read my first comment here? \$\endgroup\$
    – radagast
    Dec 2, 2013 at 7:27

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