I have built an FPGA based DDS (fc=200MHz. out: 0-50 or 0-80 MHz) . I have a decent DAC output wave and now trying to build an appropriate filter for it ( Fig-1 ). The filter works rather fine but there are 3-4 strange noises there ( I have another question here that I think the solution for each one may help in solving the other one) .

I say "strange" because according to Nyquist diagram , the image wave should be at a higher frequency but my noises are in lower parts of the band. For example at 20 MHz, we should see the image frequencies at fc-f = 200MHz-20MHz=180 MHz. This noise is easily removed by a low pass filter but I have these noises also:

1- Fig-2 50-60 Hz (this may be due to main line but this is 7 volts pk-pk !!!) .

All the upper frequencies drive on it

2- Fig-3 130-140 Hz . I can't guess where this has come.

All the upper frequencies drive on it.

3- Fig-4 Around 50 KHz: this one has steps between cycles and I have never seen anything like that before .

All the upper frequencies drive on it

The main frequency ( in this example 20 MHz) drives on to of all of them ( 4- Fig-5 ). This causes that the main frequency jumps up and down on the oscope screen


1- These noises are just seen in higher frequencies ( > 5 MHz)

2- When putting the oscope probe on 10x, their amplitude is reduced ( not too much. just a bit) but the output shows step distortions.

3- Probe's barrel clasp is connected to the ground ( with many decoupling capacitors ).

4- tried the same configuration with dedicated DDSs ( AD9850 , AD9833) and the same noises arise at freq > 5MHz.

Edition: results with an analog Oscillosciope added at the end ( Fig 7-9 )

Fig-1 The filter:

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Fig-2: 50-60 Hz:

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Fig-3: 130-140 Hz

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Fig-4 50KHz

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Fig-5 Main frequency

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Fig-6 Up jumping main frequency:

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Fig 7- analog oscilloscope: low frequency:

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Fig -8 analog oscilloscope: main frequency:

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Fig-9 analog oscilloscope: Jitter like behavior seen at fx10 setting:

enter image description here

  • 1
    \$\begingroup\$ One comment : digital sampling scopes can tell lies... at slower scan rates they can sample much more slowly than the "1GHz" or whatever the label says; this can cause unexpected aliasing. I have seen a clean looking 1Hz waveform on a scope fed with a 10kHz (probably 10.001 kHz!) square wave. Can't be sure but that's what Fig.4 looks like to me. May explain figs 2,3 too. Do you have access to a fast analog scope? \$\endgroup\$ – Brian Drummond Nov 23 '13 at 13:14
  • \$\begingroup\$ @BrianDrummond yes but not fast ( an old 20 MHz analog ). It is in the attic. Going to bring that old friend. will post the result soon. But what about the Fig-6 ? if the oscope is lying so why the output jumps up and down? \$\endgroup\$ – Aug Nov 23 '13 at 13:24
  • \$\begingroup\$ 20MHz with a 20MHz fundamental should throw light on the 50/130Hz problems... Fig 6? There may be more than one problem; that could be a logic error for example. You don't say why there are gain and offset differences between figs 5,6. \$\endgroup\$ – Brian Drummond Nov 23 '13 at 13:29
  • \$\begingroup\$ @BrianDrummond offset is what I meant by jumping up and down! the gain is related to the moment I took the photo. It repeatedly goes up and down and if I captured it in another time it might seem equal to fig-6 ( that's perhaps another lie from the oscope!) \$\endgroup\$ – Aug Nov 23 '13 at 13:35
  • \$\begingroup\$ Unprogrammed gain variations stink of aliasing, though they could also be FPGA logic errors. Also : a sch showing DAC output, filter block, terminations, measurement point may help. \$\endgroup\$ – Brian Drummond Nov 23 '13 at 13:43
  1. Your phantom signals are digital measurement errors from undersampling and a low alias frequency is the result.


  1. Your analog scope shows significant DC , low frequency components, which you may want to reject with a HPF.

  2. The filter design must be driven from a current source to work as designed with 6dB loss in the passband, since impedance ratio is 1/2. If this is my false assumption,then R1 should be in series with a voltage source.

  3. The values shown are for 80MHz LPF may has 2dB ripple in response in pass band but stopband begins at 100MHz, @ -66 dB. If you don't want the ripple, use, Chebyshev Type 2. The steep skirt as a large ripple penalty in your Cauer design or change the ripple factor.

Suggestion. Learn how to match or isolate output and load impedance so that your test measurement impedance does not introduce a false circuit load. e.g. dont load filter with a 20pF probe. Use 150 + 50 Ohm scope or Spectrum Analyzer or use a 1pF FET probe.

  • \$\begingroup\$ Thank you!. Actually, your comment no-2 if combined with more discussion may be an answer for the question I have put its link ( it has an active +300 point bounty now !).In AN837 application note , a Cauer design is recommended for DDS. which one should I select: Cauer or Chebyshev-II ? I have not access to spectrum analyzer. It would be a definite answer to the other question if you could provide a design and part value for such a filter for fclk=200MHz( fc= 0.45 * fclk) \$\endgroup\$ – Aug Nov 23 '13 at 16:47
  • \$\begingroup\$ Link to the other question: electronics.stackexchange.com/questions/91064/… \$\endgroup\$ – Aug Nov 23 '13 at 16:48
  • \$\begingroup\$ The reason is the voltage returning from the FPGA instead of the dedicated pins. please take a look at this:electronics.stackexchange.com/questions/91716/… \$\endgroup\$ – Aug Nov 24 '13 at 11:01

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